From kfournier@panix.com Sun Mar 05 14:27:41 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!panix!kfournier From: kfournier@panix.com (Karen Fournier) Newsgroups: comp.sys.m68k Subject: Observation: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Mar05.142741.3240@panix.com> Date: Sun, 05 Mar 1995 14:27:41 GMT Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: Netscape 1.1N Lines: 11 Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. Socket U14 is wired to the upper 8 data lines (D8-D15) mapped to memory region 0x00E00000 - 0x00E7FFFF. Did Marcus take the decryption EPROM with him when he left the lab? -- === Karen Fournier === Dept of Electrical Engineering, Public Access Unix of New York "They will send a copy in my place." From llopez@panix.com Mon Mar 06 23:46:41 1995 Path: ashpoly!cascade!bigsur!panix!llopez From: llopez@panix.com (Lucia López) Newsgroups: comp.sys.m68k Subject: Re: Observation: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Mar06.234641.2920@panix.com> Date: Mon, 06 Mar 1995 23:46:41 GMT References: <1995Mar05.142741.3240@panix.com> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: NewsWatcher 2.0b24 Lines: 12 In article <1995Mar05.142741.3240@panix.com>, kfournier@panix.com (Karen Fournier) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. > The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! Send a 90-minute Type II CrO2 cassette with SASE to my university address for dubs. -- Lucia López SupraFAXModem 28.8 @ ISDN 64k bps "5 sigma is a discovery. 7 is a question." From ssanchez@inria.fr Tue Mar 07 09:08:41 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!inria!ssanchez From: ssanchez@inria.fr (Seo-yeon Sánchez) Newsgroups: comp.sys.m68k Subject: Re: Observation: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Mar07.090841.5092@inria.fr> Date: Tue, 07 Mar 1995 09:08:41 GMT References: <1995Mar05.142741.3240@panix.com> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1995Mar05.142741.3240@panix.com>, kfournier@panix.com (Karen Fournier) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! My 14.4k connection dropped twice trying to fetch this thread. Keep articles concise! -- Seo-yeon Sánchez "The hatch is open. Is anyone listening?" 486DX2/66 (Linux 1.2.13) / NEXTSTEP 3.3 From apopov@tum.de Thu Mar 09 06:25:41 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!tum!apopov From: apopov@tum.de (Amy Popov) Newsgroups: comp.sys.m68k Subject: Re: Observation: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Mar09.062541.2945@tum.de> Date: Thu, 09 Mar 1995 06:25:41 GMT References: <1995Mar05.142741.3240@panix.com> Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Mar05.142741.3240@panix.com>, kfournier@panix.com (Karen Fournier) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. > The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! -- Amy Popov | apopov@tum.de PGP Key fingerprint: 9D9A BEAF 8FE3 4B11 "Keep the channels open."