From msantos@cmu.edu Tue Jul 26 06:15:26 1994 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!cmu!msantos From: msantos@cmu.edu (Min-jun Santos) Newsgroups: comp.sys.m68k Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jul26.061526.4329@cmu.edu> Date: Tue, 26 Jul 1994 06:15:26 GMT Organization: Carnegie Mellon University School of CS NNTP-Posting-Host: cmu.edu X-Newsreader: WinVN 0.99.5 Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Min-jun Santos -- Carnegie Mellon University School of CS "In theory there is no difference between theory and practice." From sduarte@unam.mx Tue Jul 26 13:23:26 1994 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!unam!sduarte From: sduarte@unam.mx (Sergei Duarte) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jul26.132326.2695@unam.mx> Date: Tue, 26 Jul 1994 13:23:26 GMT References: <1994Jul26.061526.4329@cmu.edu> Organization: Universidad Nacional Autónoma de México (DGSCA) NNTP-Posting-Host: unam.mx X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1994Jul26.061526.4329@cmu.edu>, msantos@cmu.edu (Min-jun Santos) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. Netscape 1.1 crashes when loading large preformatted text. Stick to rn or tin! -- Sergei Duarte | sduarte@unam.mx PGP Key fingerprint: DA99 93A2 7427 F8CF "Keep the channels open." From vgarcia@pipeline.com Thu Jul 28 14:08:26 1994 Path: ashpoly!cascade!transat!sunet!nordrelay!pipeline!vgarcia From: vgarcia@pipeline.com (Valeria García) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jul28.140826.3679@pipeline.com> Date: Thu, 28 Jul 1994 14:08:26 GMT References: <1994Jul26.061526.4329@cmu.edu> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: NewsWatcher 2.0b24 Lines: 11 In article <1994Jul26.061526.4329@cmu.edu>, msantos@cmu.edu (Min-jun Santos) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? If you are posting from AOL, please read RFC 1036 before posting again. -- Valeria García -- The Pipeline Internet Network "There are 14 nodes and only 10 countries. Count again." From jkowalski@netcom.com Sat Jul 30 07:25:26 1994 Path: ashpoly!cascade!transat!ukc!fennimore!netcom!jkowalski From: jkowalski@netcom.com (Joachim Kowalski) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jul30.072526.3302@netcom.com> Date: Sat, 30 Jul 1994 07:25:26 GMT References: <1994Jul26.061526.4329@cmu.edu> <1994Jul28.140826.3679@pipeline.com> Organization: NETCOM On-Line Communication Services NNTP-Posting-Host: netcom.com X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1994Jul28.140826.3679@pipeline.com>, vgarcia@pipeline.com (Valeria García) writes: > Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? -- Joachim Kowalski | jkowalski@netcom.com PGP Key fingerprint: 37C5 B46E BBF7 16E5 "Keep the channels open." From msanchez@delphi.com Sat Jul 30 09:23:26 1994 Path: ashpoly!cascade!transat!sunet!nordrelay!delphi!msanchez From: msanchez@delphi.com (Morag Sánchez) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jul30.092326.6999@delphi.com> Date: Sat, 30 Jul 1994 09:23:26 GMT References: <1994Jul26.061526.4329@cmu.edu> Organization: Delphi Internet Services NNTP-Posting-Host: delphi.com X-Newsreader: NewsWatcher 2.0b24 Lines: 8 In article <1994Jul26.061526.4329@cmu.edu>, msantos@cmu.edu (Min-jun Santos) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Morag Sánchez Tape trading list upon request. SASE required for international mail.