From npetrov@earthlink.net Fri Apr 28 13:20:21 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!earthlink!npetrov From: npetrov@earthlink.net (Nadine Petrov) Newsgroups: comp.sys.m68k Subject: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Apr28.132021.3158@earthlink.net> Date: Fri, 28 Apr 1995 13:20:21 GMT Organization: EarthLink Network NNTP-Posting-Host: earthlink.net X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Nadine Petrov Opinions expressed are solely my own and not those of EarthLink Network. ------------------------------------------------------------ From klindqvist@uni-hamburg.de Sun Apr 30 13:11:21 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!uni-hamburg!klindqvist From: klindqvist@uni-hamburg.de (Katrin Lindqvist) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Apr30.131121.2060@uni-hamburg.de> Date: Sun, 30 Apr 1995 13:11:21 GMT References: <1995Apr28.132021.3158@earthlink.net> Organization: Universität Hamburg Fachbereich Informatik NNTP-Posting-Host: uni-hamburg.de X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1995Apr28.132021.3158@earthlink.net>, npetrov@earthlink.net (Nadine Petrov) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Katrin Lindqvist Tape trading list upon request. SASE required for international mail. From opark@inria.fr Tue May 02 14:19:21 1995 Path: ashpoly!cascade!bigsur!inria!opark From: opark@inria.fr (Olga Park) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995May02.141921.5282@inria.fr> Date: Tue, 02 May 1995 14:19:21 GMT References: <1995Apr28.132021.3158@earthlink.net> <1995Apr30.131121.2060@uni-hamburg.de> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: Netscape 1.1N Lines: 9 In article <1995Apr30.131121.2060@uni-hamburg.de>, klindqvist@uni-hamburg.de (Katrin Lindqvist) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Olga Park "In theory there is no difference between theory and practice." Mac IIci / 68882 FPU / TOS 4.04