From mgonzalez@stanford.edu Tue Mar 12 06:14:19 1996 Path: ashpoly!cascade!bigsur!stanford!mgonzalez From: mgonzalez@stanford.edu (Mateo González) Newsgroups: comp.sys.m68k Subject: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Mar12.061419.7455@stanford.edu> Date: Tue, 12 Mar 1996 06:14:19 GMT Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: Netscape 1.1N Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Mateo González Opinions expressed are solely my own and not those of Stanford University Computer Systems Lab. ------------------------------------------------------------ From rschneider@mindspring.com Wed Mar 13 03:48:19 1996 Path: ashpoly!cascade!transat!eunet-fr!teletel!mindspring!rschneider From: rschneider@mindspring.com (Raj Schneider) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Mar13.034819.6602@mindspring.com> Date: Wed, 13 Mar 1996 03:48:19 GMT References: <1996Mar12.061419.7455@stanford.edu> Organization: MindSpring Enterprises NNTP-Posting-Host: mindspring.com X-Newsreader: Netscape 1.1N Lines: 12 In article <1996Mar12.061419.7455@stanford.edu>, mgonzalez@stanford.edu (Mateo González) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. PGP Public key available via finger or upon request. -- Raj Schneider *PLONK* filter active for trolls. Decstation 5000/200 - NetBSD 1.0 From ssouza@mit.edu Wed Mar 13 13:07:19 1996 Path: ashpoly!bigsur!pacrim!jpgate!kamome!mit!ssouza From: ssouza@mit.edu (Steve Souza) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Mar13.130719.7895@mit.edu> Date: Wed, 13 Mar 1996 13:07:19 GMT References: <1996Mar12.061419.7455@stanford.edu> <1996Mar13.034819.6602@mindspring.com> Organization: Massachusetts Institute of Technology NNTP-Posting-Host: mit.edu X-Newsreader: WinVN 0.99.5 Lines: 8 In article <1996Mar13.034819.6602@mindspring.com>, rschneider@mindspring.com (Raj Schneider) writes: > The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- Steve Souza -- Massachusetts Institute of Technology "When every node is whole, the channel opens." From kfournier@tum.de Fri Mar 15 04:43:19 1996 Path: ashpoly!cascade!mxgate!coyoacan!tum!kfournier From: kfournier@tum.de (Kenji Fournier) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Mar15.044319.8083@tum.de> Date: Fri, 15 Mar 1996 04:43:19 GMT References: <1996Mar12.061419.7455@stanford.edu> Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1996Mar12.061419.7455@stanford.edu>, mgonzalez@stanford.edu (Mateo González) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Kenji Fournier SupraFAXModem 28.8 @ 19,200 bps "Hold for relay."