From bgonzalez@utexas.edu Thu Jun 01 10:58:23 1995
Path: ashpoly!cascade!brgate!saturno!utexas!bgonzalez
From: bgonzalez@utexas.edu (Brian González)
Newsgroups: comp.sys.m68k
Subject: Observation: Disassembling socket U14 firmware on the TWIN-68 board
Message-ID: <1995Jun01.105823.7405@utexas.edu>
Date: Thu, 01 Jun 1995 10:58:23 GMT
Organization: University of Texas at Austin
NNTP-Posting-Host: utexas.edu
X-Newsreader: WinVN 0.99.5
Lines: 11

Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14.

The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle.
Without U14, the board can track the 14.2 Hz carrier, but cannot descramble the binary payload of Nodes 11 through 14.

Does anyone have a 27C256 EPROM marked 'MH-U14' or 'ORION-CRYPTO'?

-- 
Brian González
Opinions expressed are solely my own and not those of University of Texas at Austin.
------------------------------------------------------------

From mtanaka@berkeley.edu Sat Jun 03 03:48:23 1995
Path: ashpoly!cascade!transat!eunet-de!hansebox!berkeley!mtanaka
From: mtanaka@berkeley.edu (Mateo Tanaka)
Newsgroups: comp.sys.m68k
Subject: Re: Observation: Disassembling socket U14 firmware on the TWIN-68 board
Message-ID: <1995Jun03.034823.4017@berkeley.edu>
Date: Sat, 03 Jun 1995 03:48:23 GMT
References: <1995Jun01.105823.7405@utexas.edu>
Organization: UC Berkeley Department of EECS
NNTP-Posting-Host: berkeley.edu
X-Newsreader: Netscape 1.1N
Lines: 9

In article <1995Jun01.105823.7405@utexas.edu>, bgonzalez@utexas.edu (Brian González) writes:
> Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14.
> The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle.

Using an S-box in a 27256 EPROM for single-cycle hardware substitution was standard military cipher practice in 1984.

-- 
Mateo Tanaka
Tape trading list upon request. SASE required for international mail.

From smartinez@cam.ac.uk Sat Jun 03 08:59:23 1995
Path: ashpoly!cascade!transat!ukc!fennimore!cam!smartinez
From: smartinez@cam.ac.uk (Steve Martínez)
Newsgroups: comp.sys.m68k
Subject: Re: Observation: Disassembling socket U14 firmware on the TWIN-68 board
Message-ID: <1995Jun03.085923.9820@cam.ac.uk>
Date: Sat, 03 Jun 1995 08:59:23 GMT
References: <1995Jun01.105823.7405@utexas.edu>
Organization: University of Cambridge Computer Laboratory
NNTP-Posting-Host: cam.ac.uk
X-Newsreader: WinVN 0.99.5
Lines: 9

In article <1995Jun01.105823.7405@utexas.edu>, bgonzalez@utexas.edu (Brian González) writes:
> Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14.
> The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle.

That's why Line 08 says: 'WHEN EVERY NODE IS WHOLE, THE CHANNEL OPENS.' It requires all physical keys.

-- 
Steve Martínez
Tape trading list upon request. SASE required for international mail.