From mbrennan@panix.com Fri Sep 15 05:15:29 1995 Path: ashpoly!cascade!bigsur!panix!mbrennan From: mbrennan@panix.com (Matthias Brennan) Newsgroups: comp.sys.m68k Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Sep15.051529.1479@panix.com> Date: Fri, 15 Sep 1995 05:15:29 GMT Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: TIN [version 1.2 PL2] Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- === Matthias Brennan === Dept of Electrical Engineering, Public Access Unix of New York "The carrier frequency does not drift by accident." From fmartinez@stanford.edu Sat Sep 16 00:29:29 1995 Path: ashpoly!cascade!brgate!saturno!stanford!fmartinez From: fmartinez@stanford.edu (Freya Martínez) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Sep16.002929.3680@stanford.edu> Date: Sat, 16 Sep 1995 00:29:29 GMT References: <1995Sep15.051529.1479@panix.com> Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: TIN [version 1.2 PL2] Lines: 11 In article <1995Sep15.051529.1479@panix.com>, mbrennan@panix.com (Matthias Brennan) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Freya Martínez *PLONK* filter active for trolls. Atari TT030 - NetBSD 1.0 From ssantos@kth.se Sun Sep 17 18:02:29 1995 Path: ashpoly!cascade!brgate!saturno!kth!ssantos From: ssantos@kth.se (Sun-mi Santos) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Sep17.180229.5816@kth.se> Date: Sun, 17 Sep 1995 18:02:29 GMT References: <1995Sep15.051529.1479@panix.com> <1995Sep16.002929.3680@stanford.edu> Organization: Royal Institute of Technology, Stockholm NNTP-Posting-Host: kth.se X-Newsreader: Netscape 1.1N Lines: 11 In article <1995Sep16.002929.3680@stanford.edu>, fmartinez@stanford.edu (Freya Martínez) writes: > The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Sun-mi Santos | ssantos@kth.se PGP Key fingerprint: DD0A DF30 9803 E060 "Keep the channels open." From apetrov@uni-hamburg.de Sun Sep 17 19:29:29 1995 Path: ashpoly!cascade!mxgate!coyoacan!uni-hamburg!apetrov From: apetrov@uni-hamburg.de (Aiko Petrov) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Sep17.192929.6398@uni-hamburg.de> Date: Sun, 17 Sep 1995 19:29:29 GMT References: <1995Sep15.051529.1479@panix.com> <1995Sep16.002929.3680@stanford.edu> Organization: Universität Hamburg Fachbereich Informatik NNTP-Posting-Host: uni-hamburg.de X-Newsreader: Netscape 1.1N Lines: 8 In article <1995Sep16.002929.3680@stanford.edu>, fmartinez@stanford.edu (Freya Martínez) writes: > The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. Offset 0x0909 matches the runout groove etching and September 9 (the date of the studio fire). -- Aiko Petrov -- Universität Hamburg Fachbereich Informatik "The hatch is open. Is anyone listening?" From kivanov@uu.net Mon Sep 18 12:06:29 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!uu!kivanov From: kivanov@uu.net (Kirsty Ivanov) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Sep18.120629.4801@uu.net> Date: Mon, 18 Sep 1995 12:06:29 GMT References: <1995Sep15.051529.1479@panix.com> <1995Sep16.002929.3680@stanford.edu> <1995Sep17.180229.5816@kth.se> Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1995Sep17.180229.5816@kth.se>, ssantos@kth.se (Sun-mi Santos) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? -- Kirsty Ivanov "Hold for relay." Mac IIci / 68882 FPU / NEXTSTEP 3.3