From frodriguez@demon.co.uk Mon Feb 06 02:04:14 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!demon!frodriguez From: frodriguez@demon.co.uk (Fiona Rodríguez) Newsgroups: comp.sys.m68k Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb06.020414.7688@demon.co.uk> Date: Mon, 06 Feb 1995 02:04:14 GMT Organization: Demon Internet Services UK NNTP-Posting-Host: demon.co.uk X-Newsreader: TIN [version 1.2 PL2] Lines: 11 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Fiona Rodríguez Opinions expressed are solely my own and not those of Demon Internet Services UK. ------------------------------------------------------------ From mvasiliev@pacbell.net Tue Feb 07 04:26:14 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!pacbell!mvasiliev From: mvasiliev@pacbell.net (Mathieu Vasiliev) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb07.042614.7495@pacbell.net> Date: Tue, 07 Feb 1995 04:26:14 GMT References: <1995Feb06.020414.7688@demon.co.uk> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Feb06.020414.7688@demon.co.uk>, frodriguez@demon.co.uk (Fiona Rodríguez) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Mathieu Vasiliev *PLONK* filter active for trolls. Amiga 3000T - NetBSD 1.0 From cbrennan@delphi.com Wed Feb 08 22:14:14 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!delphi!cbrennan From: cbrennan@delphi.com (Callum Brennan) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb08.221414.6897@delphi.com> Date: Wed, 08 Feb 1995 22:14:14 GMT References: <1995Feb06.020414.7688@demon.co.uk> <1995Feb07.042614.7495@pacbell.net> Organization: Delphi Internet Services NNTP-Posting-Host: delphi.com X-Newsreader: NewsWatcher 2.0b24 Lines: 8 In article <1995Feb07.042614.7495@pacbell.net>, mvasiliev@pacbell.net (Mathieu Vasiliev) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Callum Brennan Tape trading list upon request. SASE required for international mail. From lsato@stanford.edu Thu Feb 09 16:46:14 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!stanford!lsato From: lsato@stanford.edu (Lucia Sato) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb09.164614.8883@stanford.edu> Date: Thu, 09 Feb 1995 16:46:14 GMT References: <1995Feb06.020414.7688@demon.co.uk> <1995Feb07.042614.7495@pacbell.net> Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1995Feb07.042614.7495@pacbell.net>, mvasiliev@pacbell.net (Mathieu Vasiliev) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Lucia Sato Opinions expressed are solely my own and not those of Stanford University Computer Systems Lab. ------------------------------------------------------------ From jsokolov@pipeline.com Sat Feb 11 09:54:14 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!pipeline!jsokolov From: jsokolov@pipeline.com (Jen Sokolov) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb11.095414.1443@pipeline.com> Date: Sat, 11 Feb 1995 09:54:14 GMT References: <1995Feb06.020414.7688@demon.co.uk> <1995Feb07.042614.7495@pacbell.net> <1995Feb09.164614.8883@stanford.edu> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: Netscape 1.1N Lines: 9 In article <1995Feb09.164614.8883@stanford.edu>, lsato@stanford.edu (Lucia Sato) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- === Jen Sokolov === Dept of Electrical Engineering, The Pipeline Internet Network "There are 14 nodes and only 10 countries. Count again."