From dstewart@illinois.edu Sun Feb 18 13:26:42 1996 Path: ashpoly!cascade!transat!sunet!nordrelay!illinois!dstewart From: dstewart@illinois.edu (Diego Stewart) Newsgroups: comp.sys.m68k Subject: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Feb18.132642.5064@illinois.edu> Date: Sun, 18 Feb 1996 13:26:42 GMT Organization: University of Illinois Urbana-Champaign NNTP-Posting-Host: illinois.edu X-Newsreader: TIN [version 1.2 PL2] Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Diego Stewart Tape trading list upon request. SASE required for international mail. From mnakamura@ox.ac.uk Tue Feb 20 16:37:42 1996 Path: ashpoly!cascade!transat!eunet-fr!teletel!ox!mnakamura From: mnakamura@ox.ac.uk (Mathieu Nakamura) Newsgroups: comp.sys.m68k Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Feb20.163742.6013@ox.ac.uk> Date: Tue, 20 Feb 1996 16:37:42 GMT References: <1996Feb18.132642.5064@illinois.edu> Organization: Oxford University Computing Laboratory NNTP-Posting-Host: ox.ac.uk X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1996Feb18.132642.5064@illinois.edu>, dstewart@illinois.edu (Diego Stewart) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- Mathieu Nakamura "There are 14 nodes and only 10 countries. Count again." Amiga 1200 (Blizzard 030/50) / TOS 4.04 From akowalski@pacbell.net Wed Feb 21 19:14:42 1996 Path: ashpoly!cascade!transat!eunet-de!hansebox!pacbell!akowalski From: akowalski@pacbell.net (Amy Kowalski) Newsgroups: comp.sys.m68k Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Feb21.191442.5937@pacbell.net> Date: Wed, 21 Feb 1996 19:14:42 GMT References: <1996Feb18.132642.5064@illinois.edu> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: TIN [version 1.2 PL2] Lines: 10 In article <1996Feb18.132642.5064@illinois.edu>, dstewart@illinois.edu (Diego Stewart) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Looks like a prototype telecommunications board for military secure voice, not an audio music product. -- Amy Kowalski *PLONK* filter active for trolls. Amiga 3000T - NetBSD 1.0