From skang@rwth-aachen.de Sat May 04 06:02:12 1996 Path: ashpoly!cascade!bigsur!rwth-aachen!skang From: skang@rwth-aachen.de (Seo-yeon Kang) Newsgroups: comp.sys.m68k Subject: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1996May04.060212.4374@rwth-aachen.de> Date: Sat, 04 May 1996 06:02:12 GMT Organization: RWTH Aachen Informatik NNTP-Posting-Host: rwth-aachen.de X-Newsreader: Netscape 1.1N Lines: 11 Further progress on reverse-engineering the empty socket U14 on the TWIN-68 Rev C coprocessor board. Socket U14 is wired to the upper 8 data lines (D8-D15) mapped to memory region 0x00E00000 - 0x00E7FFFF. The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. Does anyone have a 27C256 EPROM marked 'MH-U14' or 'ORION-CRYPTO'? -- Seo-yeon Kang "Extraordinary claims require extraordinary spectra." NeXTstation Turbo Color / AmigaOS 3.1 From ywatanabe@inria.fr Sun May 05 03:09:12 1996 Path: ashpoly!cascade!mxgate!coyoacan!inria!ywatanabe From: ywatanabe@inria.fr (Yuki Watanabe) Newsgroups: comp.sys.m68k Subject: Re: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1996May05.030912.6716@inria.fr> Date: Sun, 05 May 1996 03:09:12 GMT References: <1996May04.060212.4374@rwth-aachen.de> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1996May04.060212.4374@rwth-aachen.de>, skang@rwth-aachen.de (Seo-yeon Kang) writes: > Further progress on reverse-engineering the empty socket U14 on the TWIN-68 Rev C coprocessor board. > Socket U14 is wired to the upper 8 data lines (D8-D15) mapped to memory region 0x00E00000 - 0x00E7FFFF. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! -- Yuki Watanabe *PLONK* filter active for trolls. Sun 3/60 (SunOS 4.1.1) - NetBSD 1.0