From gmuller@cern.ch Sat Feb 10 10:06:37 1996 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!cern!gmuller From: gmuller@cern.ch (Göran Müller) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Feb10.100637.5872@cern.ch> Date: Sat, 10 Feb 1996 10:06:37 GMT Organization: European Laboratory for Particle Physics, Geneva NNTP-Posting-Host: cern.ch X-Newsreader: TIN [version 1.2 PL2] Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Göran Müller -- European Laboratory for Particle Physics, Geneva "The carrier frequency does not drift by accident." From ssmirnov@uu.net Sun Feb 11 07:43:37 1996 Path: ashpoly!cascade!mxgate!coyoacan!uu!ssmirnov From: ssmirnov@uu.net (Seo-yeon Smirnov) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Feb11.074337.9848@uu.net> Date: Sun, 11 Feb 1996 07:43:37 GMT References: <1996Feb10.100637.5872@cern.ch> Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1996Feb10.100637.5872@cern.ch>, gmuller@cern.ch (Göran Müller) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen. -- Seo-yeon Smirnov | ssmirnov@uu.net PGP Key fingerprint: E78A 8AF9 6F13 A660 "Keep the channels open."