From klaurent@ox.ac.uk Thu Jan 25 01:30:46 1996 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!ox!klaurent From: klaurent@ox.ac.uk (Karen Laurent) Newsgroups: comp.sys.m68k Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jan25.013046.1692@ox.ac.uk> Date: Thu, 25 Jan 1996 01:30:46 GMT Organization: Oxford University Computing Laboratory NNTP-Posting-Host: ox.ac.uk X-Newsreader: Netscape 1.1N Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Karen Laurent *PLONK* filter active for trolls. Mac IIci / 68882 FPU - NetBSD 1.0 From mnilsson@uu.net Fri Jan 26 15:52:46 1996 Path: ashpoly!cascade!transat!eunet-de!hansebox!uu!mnilsson From: mnilsson@uu.net (Matthias Nilsson) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jan26.155246.1833@uu.net> Date: Fri, 26 Jan 1996 15:52:46 GMT References: <1996Jan25.013046.1692@ox.ac.uk> Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: Netscape 1.1N Lines: 11 In article <1996Jan25.013046.1692@ox.ac.uk>, klaurent@ox.ac.uk (Karen Laurent) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. PGP Public key available via finger or upon request. -- Matthias Nilsson *PLONK* filter active for trolls. Mac IIci / 68882 FPU - NetBSD 1.0