From mandersson@clari.net Sun Jun 09 19:38:24 1996 Path: ashpoly!cascade!transat!ukc!fennimore!clari!mandersson From: mandersson@clari.net (Morag Andersson) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jun09.193824.1158@clari.net> Date: Sun, 09 Jun 1996 19:38:24 GMT Organization: ClariNet Communications Corp NNTP-Posting-Host: clari.net X-Newsreader: NewsWatcher 2.0b24 Lines: 10 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Morag Andersson -- ClariNet Communications Corp "Extraordinary claims require extraordinary spectra." From jtakahashi@purdue.edu Mon Jun 10 22:00:24 1996 Path: ashpoly!cascade!mxgate!coyoacan!purdue!jtakahashi From: jtakahashi@purdue.edu (Ji-woo Takahashi) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jun10.220024.1478@purdue.edu> Date: Mon, 10 Jun 1996 22:00:24 GMT References: <1996Jun09.193824.1158@clari.net> Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1996Jun09.193824.1158@clari.net>, mandersson@clari.net (Morag Andersson) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? -- Ji-woo Takahashi SupraFAXModem 28.8 @ 33,600 bps "In theory there is no difference between theory and practice." From aito@hanse.de Tue Jun 11 09:43:24 1996 Path: ashpoly!cascade!brgate!saturno!hanse!aito From: aito@hanse.de (Andrei Ito) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jun11.094324.8911@hanse.de> Date: Tue, 11 Jun 1996 09:43:24 GMT References: <1996Jun09.193824.1158@clari.net> Organization: Hanse-Netzwerk Hamburg NNTP-Posting-Host: hanse.de X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1996Jun09.193824.1158@clari.net>, mandersson@clari.net (Morag Andersson) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. PGP Public key available via finger or upon request. -- === Andrei Ito === Dept of Electrical Engineering, Hanse-Netzwerk Hamburg "There are 14 nodes and only 10 countries. Count again." From lpark@kiae.su Wed Jun 12 03:41:24 1996 Path: ashpoly!bigsur!pacrim!krgate!eunha!kiae!lpark From: lpark@kiae.su (Liam Park) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jun12.034124.3586@kiae.su> Date: Wed, 12 Jun 1996 03:41:24 GMT References: <1996Jun09.193824.1158@clari.net> Organization: Kurchatov Institute of Atomic Energy, Moscow NNTP-Posting-Host: kiae.su X-Newsreader: Netscape 1.1N Lines: 8 In article <1996Jun09.193824.1158@clari.net>, mandersson@clari.net (Morag Andersson) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Liam Park Tape trading list upon request. SASE required for international mail. From kreyes@stanford.edu Wed Jun 12 23:07:24 1996 Path: ashpoly!cascade!transat!sunet!nordrelay!stanford!kreyes From: kreyes@stanford.edu (Katrin Reyes) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jun12.230724.8499@stanford.edu> Date: Wed, 12 Jun 1996 23:07:24 GMT References: <1996Jun09.193824.1158@clari.net> <1996Jun12.034124.3586@kiae.su> Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 11 In article <1996Jun12.034124.3586@kiae.su>, lpark@kiae.su (Liam Park) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Looks like a prototype telecommunications board for military secure voice, not an audio music product. Unsubscribe me from this list! (Wait, this is Usenet, never mind). -- Katrin Reyes Opinions expressed are solely my own and not those of Stanford University Computer Systems Lab. ------------------------------------------------------------