From neriksson@clari.net Mon Nov 13 16:38:50 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!clari!neriksson From: neriksson@clari.net (Nadine Eriksson) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov13.163850.3708@clari.net> Date: Mon, 13 Nov 1995 16:38:50 GMT Organization: ClariNet Communications Corp NNTP-Posting-Host: clari.net X-Newsreader: Netscape 1.1N Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Nadine Eriksson Zyxel U-1496E @ 14,400 bps "They will send a copy in my place." From eokonkwo@titech.ac.jp Tue Nov 14 06:53:50 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!titech!eokonkwo From: eokonkwo@titech.ac.jp (Elaine Okonkwo) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov14.065350.8220@titech.ac.jp> Date: Tue, 14 Nov 1995 06:53:50 GMT References: <1995Nov13.163850.3708@clari.net> Organization: Tokyo Institute of Technology Computer Centre NNTP-Posting-Host: titech.ac.jp X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Nov13.163850.3708@clari.net>, neriksson@clari.net (Nadine Eriksson) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Elaine Okonkwo | eokonkwo@titech.ac.jp PGP Key fingerprint: 6225 B4EA 7E5C D531 "Keep the channels open." From dsilva@pipeline.com Tue Nov 14 19:17:50 1995 Path: ashpoly!cascade!mxgate!coyoacan!pipeline!dsilva From: dsilva@pipeline.com (Dmitri Silva) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov14.191750.1556@pipeline.com> Date: Tue, 14 Nov 1995 19:17:50 GMT References: <1995Nov13.163850.3708@clari.net> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: TIN [version 1.2 PL2] Lines: 8 In article <1995Nov13.163850.3708@clari.net>, neriksson@clari.net (Nadine Eriksson) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Dmitri Silva Tape trading list upon request. SASE required for international mail. From jkim@hanse.de Thu Nov 16 08:46:50 1995 Path: ashpoly!cascade!bigsur!hanse!jkim From: jkim@hanse.de (Joachim Kim) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov16.084650.1558@hanse.de> Date: Thu, 16 Nov 1995 08:46:50 GMT References: <1995Nov13.163850.3708@clari.net> <1995Nov14.191750.1556@pipeline.com> Organization: Hanse-Netzwerk Hamburg NNTP-Posting-Host: hanse.de X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1995Nov14.191750.1556@pipeline.com>, dsilva@pipeline.com (Dmitri Silva) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Joachim Kim Opinions expressed are solely my own and not those of Hanse-Netzwerk Hamburg. ------------------------------------------------------------