From imuller@panix.com Wed Mar 15 06:27:28 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!panix!imuller From: imuller@panix.com (Ines Müller) Newsgroups: comp.sys.m68k Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Mar15.062728.8599@panix.com> Date: Wed, 15 Mar 1995 06:27:28 GMT Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: WinVN 0.99.5 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Ines Müller Practical Peripherals 14.4 @ 14,400 bps "The hatch is open. Is anyone listening?" From yeriksson@delphi.com Wed Mar 15 14:35:28 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!delphi!yeriksson From: yeriksson@delphi.com (Yuki Eriksson) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Mar15.143528.7931@delphi.com> Date: Wed, 15 Mar 1995 14:35:28 GMT References: <1995Mar15.062728.8599@panix.com> Organization: Delphi Internet Services NNTP-Posting-Host: delphi.com X-Newsreader: TIN [version 1.2 PL2] Lines: 10 In article <1995Mar15.062728.8599@panix.com>, imuller@panix.com (Ines Müller) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- === Yuki Eriksson === Dept of Electrical Engineering, Delphi Internet Services "Hardware is temporary. The signal survives." From mlindqvist@pipeline.com Thu Mar 16 15:15:28 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!pipeline!mlindqvist From: mlindqvist@pipeline.com (Marisol Lindqvist) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Mar16.151528.4632@pipeline.com> Date: Thu, 16 Mar 1995 15:15:28 GMT References: <1995Mar15.062728.8599@panix.com> <1995Mar15.143528.7931@delphi.com> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: Netscape 1.1N Lines: 9 In article <1995Mar15.143528.7931@delphi.com>, yeriksson@delphi.com (Yuki Eriksson) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Marisol Lindqvist Zyxel U-1496E @ 14,400 bps "The hatch is open. Is anyone listening?" From iduarte@hanse.de Thu Mar 16 22:25:28 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!hanse!iduarte From: iduarte@hanse.de (Ines Duarte) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Mar16.222528.1230@hanse.de> Date: Thu, 16 Mar 1995 22:25:28 GMT References: <1995Mar15.062728.8599@panix.com> <1995Mar15.143528.7931@delphi.com> Organization: Hanse-Netzwerk Hamburg NNTP-Posting-Host: hanse.de X-Newsreader: NewsWatcher 2.0b24 Lines: 8 In article <1995Mar15.143528.7931@delphi.com>, yeriksson@delphi.com (Yuki Eriksson) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Ines Duarte Tape trading list upon request. SASE required for international mail.