From geriksson@pacbell.net Sat Mar 26 05:09:01 1994 Path: ashpoly!cascade!transat!sunet!nordrelay!pacbell!geriksson From: geriksson@pacbell.net (Graham Eriksson) Newsgroups: comp.sys.m68k Subject: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar26.050901.6535@pacbell.net> Date: Sat, 26 Mar 1994 05:09:01 GMT Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: WinVN 0.99.5 Lines: 11 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- === Graham Eriksson === Dept of Electrical Engineering, Pacific Bell Internet Services "Measuring a record you own is listening, not piracy." From hchoi@purdue.edu Mon Mar 28 03:36:01 1994 Path: ashpoly!cascade!brgate!saturno!purdue!hchoi From: hchoi@purdue.edu (Hana Choi) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar28.033601.2005@purdue.edu> Date: Mon, 28 Mar 1994 03:36:01 GMT References: <1994Mar26.050901.6535@pacbell.net> Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: Netscape 1.1N Lines: 10 In article <1994Mar26.050901.6535@pacbell.net>, geriksson@pacbell.net (Graham Eriksson) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. > At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Hana Choi Practical Peripherals 14.4 @ 19,200 bps "A soul is not exclusive to biology." From hrodriguez@panix.com Mon Mar 28 09:43:01 1994 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!panix!hrodriguez From: hrodriguez@panix.com (Hugo Rodríguez) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar28.094301.9332@panix.com> Date: Mon, 28 Mar 1994 09:43:01 GMT References: <1994Mar26.050901.6535@pacbell.net> <1994Mar28.033601.2005@purdue.edu> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1994Mar28.033601.2005@purdue.edu>, hchoi@purdue.edu (Hana Choi) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Hugo Rodríguez Opinions expressed are solely my own and not those of Public Access Unix of New York. ------------------------------------------------------------ From jlee@illinois.edu Mon Mar 28 16:56:01 1994 Path: ashpoly!bigsur!pacrim!jpgate!kamome!illinois!jlee From: jlee@illinois.edu (Jens Lee) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar28.165601.6574@illinois.edu> Date: Mon, 28 Mar 1994 16:56:01 GMT References: <1994Mar26.050901.6535@pacbell.net> <1994Mar28.033601.2005@purdue.edu> <1994Mar28.094301.9332@panix.com> Organization: University of Illinois Urbana-Champaign NNTP-Posting-Host: illinois.edu X-Newsreader: Netscape 1.1N Lines: 9 In article <1994Mar28.094301.9332@panix.com>, hrodriguez@panix.com (Hugo Rodríguez) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Jens Lee "5 sigma is a discovery. 7 is a question." Amiga 1200 (Blizzard 030/50) / FreeBSD 2.1