From rtakahashi@tum.de Mon Mar 28 09:15:48 1994 Path: ashpoly!cascade!brgate!saturno!tum!rtakahashi From: rtakahashi@tum.de (Rodrigo Takahashi) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar28.091548.6055@tum.de> Date: Mon, 28 Mar 1994 09:15:48 GMT Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: Netscape 1.1N Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Rodrigo Takahashi *PLONK* filter active for trolls. Acorn RiscPC 600 - NetBSD 1.0 From slaurent@utexas.edu Tue Mar 29 20:09:48 1994 Path: ashpoly!cascade!bigsur!utexas!slaurent From: slaurent@utexas.edu (Steve Laurent) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar29.200948.5276@utexas.edu> Date: Tue, 29 Mar 1994 20:09:48 GMT References: <1994Mar28.091548.6055@tum.de> Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: Netscape 1.1N Lines: 10 In article <1994Mar28.091548.6055@tum.de>, rtakahashi@tum.de (Rodrigo Takahashi) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- === Steve Laurent === Dept of Electrical Engineering, University of Texas at Austin "Do not worship the copy."