From svasiliev@pipeline.com Fri Jan 13 14:06:03 1995 Path: ashpoly!cascade!mxgate!coyoacan!pipeline!svasiliev From: svasiliev@pipeline.com (Seo-yeon Vasiliev) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan13.140603.4025@pipeline.com> Date: Fri, 13 Jan 1995 14:06:03 GMT Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: Netscape 1.1N Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Seo-yeon Vasiliev "Tape doesn't lie at 02:14. Ears do." NeXTstation Turbo Color / Linux 1.2.13 From mlarsson@hanse.de Sat Jan 14 15:23:03 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!hanse!mlarsson From: mlarsson@hanse.de (Mei Larsson) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan14.152303.4061@hanse.de> Date: Sat, 14 Jan 1995 15:23:03 GMT References: <1995Jan13.140603.4025@pipeline.com> Organization: Hanse-Netzwerk Hamburg NNTP-Posting-Host: hanse.de X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1995Jan13.140603.4025@pipeline.com>, svasiliev@pipeline.com (Seo-yeon Vasiliev) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen. My 14.4k connection dropped twice trying to fetch this thread. Keep articles concise! -- Mei Larsson Tape trading list upon request. SASE required for international mail. From mramirez@tum.de Mon Jan 16 11:37:03 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!tum!mramirez From: mramirez@tum.de (Min-jun Ramírez) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan16.113703.3842@tum.de> Date: Mon, 16 Jan 1995 11:37:03 GMT References: <1995Jan13.140603.4025@pipeline.com> Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1995Jan13.140603.4025@pipeline.com>, svasiliev@pipeline.com (Seo-yeon Vasiliev) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- === Min-jun Ramírez === Dept of Electrical Engineering, Technische Universität München "Tape doesn't lie at 02:14. Ears do." From btakahashi@panix.com Tue Jan 17 18:59:03 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!panix!btakahashi From: btakahashi@panix.com (Bastien Takahashi) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan17.185903.7380@panix.com> Date: Tue, 17 Jan 1995 18:59:03 GMT References: <1995Jan13.140603.4025@pipeline.com> <1995Jan14.152303.4061@hanse.de> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: TIN [version 1.2 PL2] Lines: 11 In article <1995Jan14.152303.4061@hanse.de>, mlarsson@hanse.de (Mei Larsson) writes: > Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen. > My 14.4k connection dropped twice trying to fetch this thread. Keep articles concise! That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Bastien Takahashi Tape trading list upon request. SASE required for international mail.