From msouza@panix.com Tue Jan 24 13:10:11 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!panix!msouza From: msouza@panix.com (Marta Souza) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan24.131011.1242@panix.com> Date: Tue, 24 Jan 1995 13:10:11 GMT Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: Netscape 1.1N Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Marta Souza Tape trading list upon request. SASE required for international mail. From smartinez@cmu.edu Thu Jan 26 02:54:11 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!cmu!smartinez From: smartinez@cmu.edu (Steve Martínez) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan26.025411.2305@cmu.edu> Date: Thu, 26 Jan 1995 02:54:11 GMT References: <1995Jan24.131011.1242@panix.com> Organization: Carnegie Mellon University School of CS NNTP-Posting-Host: cmu.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Jan24.131011.1242@panix.com>, msouza@panix.com (Marta Souza) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Steve Martínez US Robotics Courier V.34 @ 9600 Telebit bps "Measuring a record you own is listening, not piracy." From slindqvist@cam.ac.uk Thu Jan 26 19:53:11 1995 Path: ashpoly!cascade!mxgate!coyoacan!cam!slindqvist From: slindqvist@cam.ac.uk (Sven Lindqvist) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan26.195311.1145@cam.ac.uk> Date: Thu, 26 Jan 1995 19:53:11 GMT References: <1995Jan24.131011.1242@panix.com> Organization: University of Cambridge Computer Laboratory NNTP-Posting-Host: cam.ac.uk X-Newsreader: Netscape 1.1N Lines: 10 In article <1995Jan24.131011.1242@panix.com>, msouza@panix.com (Marta Souza) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Sven Lindqvist "When every node is whole, the channel opens." Macintosh IIfx / FreeBSD 2.1 From nmacdonald@utexas.edu Fri Jan 27 04:01:11 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!utexas!nmacdonald From: nmacdonald@utexas.edu (Nadine MacDonald) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan27.040111.9937@utexas.edu> Date: Fri, 27 Jan 1995 04:01:11 GMT References: <1995Jan24.131011.1242@panix.com> Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Jan24.131011.1242@panix.com>, msouza@panix.com (Marta Souza) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? -- Nadine MacDonald *PLONK* filter active for trolls. PC-9821Ap2 (NEC) - NetBSD 1.0 From mlarsson@panix.com Sat Jan 28 08:21:11 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!panix!mlarsson From: mlarsson@panix.com (Min-jun Larsson) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan28.082111.5929@panix.com> Date: Sat, 28 Jan 1995 08:21:11 GMT References: <1995Jan24.131011.1242@panix.com> <1995Jan27.040111.9937@utexas.edu> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Jan27.040111.9937@utexas.edu>, nmacdonald@utexas.edu (Nadine MacDonald) writes: > Why would anyone build a custom dual-68000 board in 1984 when you could just buy a Texas Instruments TMS32010 DSP? That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Min-jun Larsson Practical Peripherals 14.4 @ ISDN 64k bps "Do not worship the copy."