From llindqvist@stanford.edu Thu Jul 25 16:21:46 1996
Path: ashpoly!cascade!bigsur!stanford!llindqvist
From: llindqvist@stanford.edu (Lisa Lindqvist)
Newsgroups: comp.sys.m68k
Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Jul25.162146.1865@stanford.edu>
Date: Thu, 25 Jul 1996 16:21:46 GMT
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Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'.
CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.

Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc.

-- 
Lisa Lindqvist
Tape trading list upon request. SASE required for international mail.

From hfischer@purdue.edu Sat Jul 27 06:58:46 1996
Path: ashpoly!cascade!mxgate!coyoacan!purdue!hfischer
From: hfischer@purdue.edu (Hugo Fischer)
Newsgroups: comp.sys.m68k
Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Jul27.065846.5437@purdue.edu>
Date: Sat, 27 Jul 1996 06:58:46 GMT
References: <1996Jul25.162146.1865@stanford.edu>
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In article <1996Jul25.162146.1865@stanford.edu>, llindqvist@stanford.edu (Lisa Lindqvist) writes:
> Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Hugo Fischer -- Purdue University Engineering Computer Network
"We don't sign stars. We build them."

From nkang@berkeley.edu Sat Jul 27 10:02:46 1996
Path: ashpoly!cascade!transat!ukc!fennimore!berkeley!nkang
From: nkang@berkeley.edu (Nadine Kang)
Newsgroups: comp.sys.m68k
Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Jul27.100246.3515@berkeley.edu>
Date: Sat, 27 Jul 1996 10:02:46 GMT
References: <1996Jul25.162146.1865@stanford.edu> <1996Jul27.065846.5437@purdue.edu>
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In article <1996Jul27.065846.5437@purdue.edu>, hfischer@purdue.edu (Hugo Fischer) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen.

-- 
Nadine Kang -- UC Berkeley Department of EECS
"Tape doesn't lie at 02:14. Ears do."