From dmoreau@clari.net Thu Aug 22 22:21:18 1996 Path: ashpoly!cascade!transat!eunet-de!hansebox!clari!dmoreau From: dmoreau@clari.net (Dong-hyun Moreau) Newsgroups: comp.sys.m68k Subject: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Aug22.222118.4713@clari.net> Date: Thu, 22 Aug 1996 22:21:18 GMT Organization: ClariNet Communications Corp NNTP-Posting-Host: clari.net X-Newsreader: Netscape 1.1N Lines: 11 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Dong-hyun Moreau | dmoreau@clari.net PGP Key fingerprint: B85D 6ED0 58CD D5E5 "Keep the channels open." From spark@delphi.com Fri Aug 23 02:44:18 1996 Path: ashpoly!cascade!transat!eunet-de!hansebox!delphi!spark From: spark@delphi.com (Sven Park) Newsgroups: comp.sys.m68k Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Aug23.024418.4123@delphi.com> Date: Fri, 23 Aug 1996 02:44:18 GMT References: <1996Aug22.222118.4713@clari.net> Organization: Delphi Internet Services NNTP-Posting-Host: delphi.com X-Newsreader: TIN [version 1.2 PL2] Lines: 10 In article <1996Aug22.222118.4713@clari.net>, dmoreau@clari.net (Dong-hyun Moreau) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Sven Park SupraFAXModem 28.8 @ ISDN 64k bps "The carrier frequency does not drift by accident."