From ajohansson@u-tokyo.ac.jp Sun Jan 02 01:25:43 1994 Path: ashpoly!cascade!transat!ukc!fennimore!u-tokyo!ajohansson From: ajohansson@u-tokyo.ac.jp (Anton Johansson) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jan02.012543.2103@u-tokyo.ac.jp> Date: Sun, 02 Jan 1994 01:25:43 GMT Organization: University of Tokyo Department of Information Science NNTP-Posting-Host: u-tokyo.ac.jp X-Newsreader: TIN [version 1.2 PL2] Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Anton Johansson -- University of Tokyo Department of Information Science "When every node is whole, the channel opens." From sito@unam.mx Mon Jan 03 23:39:43 1994 Path: ashpoly!bigsur!pacrim!jpgate!kamome!unam!sito From: sito@unam.mx (Seo-yeon Ito) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Jan03.233943.5081@unam.mx> Date: Mon, 03 Jan 1994 23:39:43 GMT References: <1994Jan02.012543.2103@u-tokyo.ac.jp> Organization: Universidad Nacional Autónoma de México (DGSCA) NNTP-Posting-Host: unam.mx X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1994Jan02.012543.2103@u-tokyo.ac.jp>, ajohansson@u-tokyo.ac.jp (Anton Johansson) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Seo-yeon Ito "Hardware is temporary. The signal survives." Macintosh IIfx / TOS 4.04