From tstewart@utexas.edu Sat Nov 11 06:11:35 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!utexas!tstewart From: tstewart@utexas.edu (Takeshi Stewart) Newsgroups: comp.sys.m68k Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov11.061135.3945@utexas.edu> Date: Sat, 11 Nov 1995 06:11:35 GMT Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: WinVN 0.99.5 Lines: 10 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Takeshi Stewart -- University of Texas at Austin "We don't sign stars. We build them." From mvasiliev@u-tokyo.ac.jp Sat Nov 11 11:43:35 1995 Path: ashpoly!cascade!mxgate!coyoacan!u-tokyo!mvasiliev From: mvasiliev@u-tokyo.ac.jp (Marisol Vasiliev) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov11.114335.7828@u-tokyo.ac.jp> Date: Sat, 11 Nov 1995 11:43:35 GMT References: <1995Nov11.061135.3945@utexas.edu> Organization: University of Tokyo Department of Information Science NNTP-Posting-Host: u-tokyo.ac.jp X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Nov11.061135.3945@utexas.edu>, tstewart@utexas.edu (Takeshi Stewart) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Marisol Vasiliev US Robotics Courier V.34 @ 28,800 bps "There are 14 nodes and only 10 countries. Count again."