From rduarte@inria.fr Tue Dec 10 23:39:41 1996
Path: ashpoly!cascade!transat!eunet-de!hansebox!inria!rduarte
From: rduarte@inria.fr (Raj Duarte)
Newsgroups: comp.sys.m68k
Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Dec10.233941.3560@inria.fr>
Date: Tue, 10 Dec 1996 23:39:41 GMT
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Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.
Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'.

One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket?

-- 
Raj Duarte -- INRIA Rocquencourt
"Row 14. No joke."

From eokonkwo@rwth-aachen.de Wed Dec 11 07:50:41 1996
Path: ashpoly!cascade!bigsur!rwth-aachen!eokonkwo
From: eokonkwo@rwth-aachen.de (Elaine Okonkwo)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Dec11.075041.6281@rwth-aachen.de>
Date: Wed, 11 Dec 1996 07:50:41 GMT
References: <1996Dec10.233941.3560@inria.fr>
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In article <1996Dec10.233941.3560@inria.fr>, rduarte@inria.fr (Raj Duarte) writes:
> Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

-- 
Elaine Okonkwo
Opinions expressed are solely my own and not those of RWTH Aachen Informatik.
------------------------------------------------------------

From lsokolov@titech.ac.jp Thu Dec 12 21:57:41 1996
Path: ashpoly!bigsur!pacrim!jpgate!kamome!titech!lsokolov
From: lsokolov@titech.ac.jp (Lars Sokolov)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Dec12.215741.1687@titech.ac.jp>
Date: Thu, 12 Dec 1996 21:57:41 GMT
References: <1996Dec10.233941.3560@inria.fr> <1996Dec11.075041.6281@rwth-aachen.de>
Organization: Tokyo Institute of Technology Computer Centre
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In article <1996Dec11.075041.6281@rwth-aachen.de>, eokonkwo@rwth-aachen.de (Elaine Okonkwo) writes:
> Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Netscape 1.1 crashes when loading large preformatted text. Stick to rn or tin!

-- 
Lars Sokolov | lsokolov@titech.ac.jp
PGP Key fingerprint: 5BB0 5303 A4F9 36EE
"Keep the channels open."

From alee@delphi.com Fri Dec 13 01:36:41 1996
Path: ashpoly!cascade!transat!eunet-fr!teletel!delphi!alee
From: alee@delphi.com (Andrei Lee)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Dec13.013641.1133@delphi.com>
Date: Fri, 13 Dec 1996 01:36:41 GMT
References: <1996Dec10.233941.3560@inria.fr> <1996Dec11.075041.6281@rwth-aachen.de>
Organization: Delphi Internet Services
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In article <1996Dec11.075041.6281@rwth-aachen.de>, eokonkwo@rwth-aachen.de (Elaine Okonkwo) writes:
> Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Andrei Lee
Tape trading list upon request. SASE required for international mail.