From grobertson@pipeline.com Wed Aug 09 09:56:14 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!pipeline!grobertson From: grobertson@pipeline.com (Göran Robertson) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Aug09.095614.3117@pipeline.com> Date: Wed, 09 Aug 1995 09:56:14 GMT Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: Netscape 1.1N Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Göran Robertson "Do not worship the copy." Sun SparcStation 20 / FreeBSD 2.1 From asanchez@purdue.edu Thu Aug 10 02:35:14 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!purdue!asanchez From: asanchez@purdue.edu (Andrei Sánchez) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Aug10.023514.6737@purdue.edu> Date: Thu, 10 Aug 1995 02:35:14 GMT References: <1995Aug09.095614.3117@pipeline.com> Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Aug09.095614.3117@pipeline.com>, grobertson@pipeline.com (Göran Robertson) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Andrei Sánchez -- Purdue University Engineering Computer Network "They will send a copy in my place."