From dnakamura@utexas.edu Tue Jan 09 00:12:47 1996 Path: ashpoly!cascade!transat!eunet-fr!teletel!utexas!dnakamura From: dnakamura@utexas.edu (Dave Nakamura) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jan09.001247.1202@utexas.edu> Date: Tue, 09 Jan 1996 00:12:47 GMT Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: WinVN 0.99.5 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Dave Nakamura SupraFAXModem 28.8 @ 9600 Telebit bps "Tape doesn't lie at 02:14. Ears do." From bito@mindspring.com Wed Jan 10 22:54:47 1996 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!mindspring!bito From: bito@mindspring.com (Bruno Ito) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Jan10.225447.9680@mindspring.com> Date: Wed, 10 Jan 1996 22:54:47 GMT References: <1996Jan09.001247.1202@utexas.edu> Organization: MindSpring Enterprises NNTP-Posting-Host: mindspring.com X-Newsreader: Netscape 1.1N Lines: 9 In article <1996Jan09.001247.1202@utexas.edu>, dnakamura@utexas.edu (Dave Nakamura) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Bruno Ito Tape trading list upon request. SASE required for international mail.