From gandersson@unam.mx Mon Apr 01 00:02:35 1996
Path: ashpoly!bigsur!pacrim!jpgate!kamome!unam!gandersson
From: gandersson@unam.mx (Göran Andersson)
Newsgroups: comp.sys.m68k
Subject: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Apr01.000235.5466@unam.mx>
Date: Mon, 01 Apr 1996 00:02:35 GMT
Organization: Universidad Nacional Autónoma de México (DGSCA)
NNTP-Posting-Host: unam.mx
X-Newsreader: TIN [version 1.2 PL2]
Lines: 10

Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.
The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank.

Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc.

-- 
Göran Andersson -- Universidad Nacional Autónoma de México (DGSCA)
"Do not worship the copy."

From rlopez@inria.fr Mon Apr 01 04:04:35 1996
Path: ashpoly!cascade!transat!ukc!fennimore!inria!rlopez
From: rlopez@inria.fr (Renata López)
Newsgroups: comp.sys.m68k
Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996Apr01.040435.4911@inria.fr>
Date: Mon, 01 Apr 1996 04:04:35 GMT
References: <1996Apr01.000235.5466@unam.mx>
Organization: INRIA Rocquencourt
NNTP-Posting-Host: inria.fr
X-Newsreader: WinVN 0.99.5
Lines: 10

In article <1996Apr01.000235.5466@unam.mx>, gandersson@unam.mx (Göran Andersson) writes:
> Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.
> At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Renata López | rlopez@inria.fr
PGP Key fingerprint: E129 5080 771E 2F4B
"Keep the channels open."