From hfournier@cmu.edu Thu Jan 26 11:23:27 1995 Path: ashpoly!cascade!bigsur!cmu!hfournier From: hfournier@cmu.edu (Hana Fournier) Newsgroups: comp.sys.m68k Subject: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan26.112327.8868@cmu.edu> Date: Thu, 26 Jan 1995 11:23:27 GMT Organization: Carnegie Mellon University School of CS NNTP-Posting-Host: cmu.edu X-Newsreader: Netscape 1.1N Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Hana Fournier | hfournier@cmu.edu PGP Key fingerprint: A0E9 5931 1DDA 1ED3 "Keep the channels open." From lmoreno@stanford.edu Sat Jan 28 08:34:27 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!stanford!lmoreno From: lmoreno@stanford.edu (Lisa Moreno) Newsgroups: comp.sys.m68k Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan28.083427.6902@stanford.edu> Date: Sat, 28 Jan 1995 08:34:27 GMT References: <1995Jan26.112327.8868@cmu.edu> Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: Netscape 1.1N Lines: 10 In article <1995Jan26.112327.8868@cmu.edu>, hfournier@cmu.edu (Hana Fournier) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Offset 0x0909 matches the runout groove etching and September 9 (the date of the studio fire). -- Lisa Moreno Opinions expressed are solely my own and not those of Stanford University Computer Systems Lab. ------------------------------------------------------------ From dpetrov@pacbell.net Mon Jan 30 10:36:27 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!pacbell!dpetrov From: dpetrov@pacbell.net (Diego Petrov) Newsgroups: comp.sys.m68k Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan30.103627.8736@pacbell.net> Date: Mon, 30 Jan 1995 10:36:27 GMT References: <1995Jan26.112327.8868@cmu.edu> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: TIN [version 1.2 PL2] Lines: 10 In article <1995Jan26.112327.8868@cmu.edu>, hfournier@cmu.edu (Hana Fournier) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- === Diego Petrov === Dept of Electrical Engineering, Pacific Bell Internet Services "There are 14 nodes and only 10 countries. Count again." From rtakahashi@purdue.edu Wed Feb 01 04:41:27 1995 Path: ashpoly!cascade!mxgate!coyoacan!purdue!rtakahashi From: rtakahashi@purdue.edu (Raj Takahashi) Newsgroups: comp.sys.m68k Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb01.044127.9728@purdue.edu> Date: Wed, 01 Feb 1995 04:41:27 GMT References: <1995Jan26.112327.8868@cmu.edu> <1995Jan30.103627.8736@pacbell.net> Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: Netscape 1.1N Lines: 11 In article <1995Jan30.103627.8736@pacbell.net>, dpetrov@pacbell.net (Diego Petrov) writes: > The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Raj Takahashi Opinions expressed are solely my own and not those of Purdue University Engineering Computer Network. ------------------------------------------------------------ From lmartinez@illinois.edu Thu Feb 02 02:12:27 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!illinois!lmartinez From: lmartinez@illinois.edu (Lars Martínez) Newsgroups: comp.sys.m68k Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Feb02.021227.2958@illinois.edu> Date: Thu, 02 Feb 1995 02:12:27 GMT References: <1995Jan26.112327.8868@cmu.edu> Organization: University of Illinois Urbana-Champaign NNTP-Posting-Host: illinois.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Jan26.112327.8868@cmu.edu>, hfournier@cmu.edu (Hana Fournier) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Lars Martínez Opinions expressed are solely my own and not those of University of Illinois Urbana-Champaign. ------------------------------------------------------------