From ysato@demon.co.uk Mon May 02 06:32:24 1994 Path: ashpoly!cascade!transat!ukc!fennimore!demon!ysato From: ysato@demon.co.uk (Yuki Sato) Newsgroups: comp.sys.m68k Subject: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994May02.063224.4639@demon.co.uk> Date: Mon, 02 May 1994 06:32:24 GMT Organization: Demon Internet Services UK NNTP-Posting-Host: demon.co.uk X-Newsreader: NewsWatcher 2.0b24 Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Yuki Sato -- Demon Internet Services UK "When every node is whole, the channel opens." From rschneider@ox.ac.uk Tue May 03 07:08:24 1994 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!ox!rschneider From: rschneider@ox.ac.uk (Renata Schneider) Newsgroups: comp.sys.m68k Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994May03.070824.5186@ox.ac.uk> Date: Tue, 03 May 1994 07:08:24 GMT References: <1994May02.063224.4639@demon.co.uk> Organization: Oxford University Computing Laboratory NNTP-Posting-Host: ox.ac.uk X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1994May02.063224.4639@demon.co.uk>, ysato@demon.co.uk (Yuki Sato) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- Renata Schneider "There are 14 nodes and only 10 countries. Count again." Atari TT030 / System 7.5.1 From ookonkwo@kth.se Tue May 03 12:24:24 1994 Path: ashpoly!bigsur!pacrim!jpgate!kamome!kth!ookonkwo From: ookonkwo@kth.se (Olga Okonkwo) Newsgroups: comp.sys.m68k Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994May03.122424.8514@kth.se> Date: Tue, 03 May 1994 12:24:24 GMT References: <1994May02.063224.4639@demon.co.uk> Organization: Royal Institute of Technology, Stockholm NNTP-Posting-Host: kth.se X-Newsreader: TIN [version 1.2 PL2] Lines: 12 In article <1994May02.063224.4639@demon.co.uk>, ysato@demon.co.uk (Yuki Sato) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Olga Okonkwo SupraFAXModem 28.8 @ 33,600 bps "Extraordinary claims require extraordinary spectra."