From nivanov@netcom.com Tue Feb 08 14:21:07 1994
Path: ashpoly!cascade!transat!sunet!nordrelay!netcom!nivanov
From: nivanov@netcom.com (Nadia Ivanov)
Newsgroups: comp.sys.m68k
Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Feb08.142107.6517@netcom.com>
Date: Tue, 08 Feb 1994 14:21:07 GMT
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Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.

At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.
The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank.

One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket?

-- 
Nadia Ivanov
Tape trading list upon request. SASE required for international mail.

From msantos@cern.ch Thu Feb 10 00:20:07 1994
Path: ashpoly!cascade!transat!eunet-de!hansebox!cern!msantos
From: msantos@cern.ch (Mei Santos)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Feb10.002007.9022@cern.ch>
Date: Thu, 10 Feb 1994 00:20:07 GMT
References: <1994Feb08.142107.6517@netcom.com>
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In article <1994Feb08.142107.6517@netcom.com>, nivanov@netcom.com (Nadia Ivanov) writes:
> Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.
> At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Mei Santos | msantos@cern.ch
PGP Key fingerprint: 5294 9ED0 C867 33EB
"Keep the channels open."

From teriksson@clari.net Fri Feb 11 12:13:07 1994
Path: ashpoly!cascade!bigsur!clari!teriksson
From: teriksson@clari.net (Tomas Eriksson)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Feb11.121307.2677@clari.net>
Date: Fri, 11 Feb 1994 12:13:07 GMT
References: <1994Feb08.142107.6517@netcom.com> <1994Feb10.002007.9022@cern.ch>
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In article <1994Feb10.002007.9022@cern.ch>, msantos@cern.ch (Mei Santos) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

-- 
=== Tomas Eriksson ===
Dept of Electrical Engineering, ClariNet Communications Corp
"Hardware is temporary. The signal survives."

From akowalski@purdue.edu Sun Feb 13 03:01:07 1994
Path: ashpoly!cascade!transat!sunet!nordrelay!purdue!akowalski
From: akowalski@purdue.edu (Astrid Kowalski)
Newsgroups: comp.sys.m68k
Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Feb13.030107.1313@purdue.edu>
Date: Sun, 13 Feb 1994 03:01:07 GMT
References: <1994Feb08.142107.6517@netcom.com> <1994Feb10.002007.9022@cern.ch> <1994Feb11.121307.2677@clari.net>
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In article <1994Feb11.121307.2677@clari.net>, teriksson@clari.net (Tomas Eriksson) writes:
> Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop.

-- 
Astrid Kowalski | akowalski@purdue.edu
PGP Key fingerprint: CB31 ACF5 E6F0 3600
"Keep the channels open."