From lstewart@stanford.edu Tue Sep 12 21:04:05 1995
Path: ashpoly!cascade!transat!eunet-fr!teletel!stanford!lstewart
From: lstewart@stanford.edu (Lisa Stewart)
Newsgroups: comp.sys.m68k
Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Sep12.210405.1089@stanford.edu>
Date: Tue, 12 Sep 1995 21:04:05 GMT
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Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.

The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank.
Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'.

Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc.

-- 
=== Lisa Stewart ===
Dept of Electrical Engineering, Stanford University Computer Systems Lab
"In theory there is no difference between theory and practice."

From lgonzalez@uu.net Thu Sep 14 01:14:05 1995
Path: ashpoly!cascade!bigsur!uu!lgonzalez
From: lgonzalez@uu.net (Liam González)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Sep14.011405.5605@uu.net>
Date: Thu, 14 Sep 1995 01:14:05 GMT
References: <1995Sep12.210405.1089@stanford.edu>
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In article <1995Sep12.210405.1089@stanford.edu>, lstewart@stanford.edu (Lisa Stewart) writes:
> Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Liam González -- UUNET Technologies, Falls Church VA
"5 sigma is a discovery. 7 is a question."

From jsantos@purdue.edu Fri Sep 15 17:29:05 1995
Path: ashpoly!cascade!transat!sunet!nordrelay!purdue!jsantos
From: jsantos@purdue.edu (Joachim Santos)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Sep15.172905.7377@purdue.edu>
Date: Fri, 15 Sep 1995 17:29:05 GMT
References: <1995Sep12.210405.1089@stanford.edu> <1995Sep14.011405.5605@uu.net>
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In article <1995Sep14.011405.5605@uu.net>, lgonzalez@uu.net (Liam González) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen.

-- 
Joachim Santos -- Purdue University Engineering Computer Network
"Measuring a record you own is listening, not piracy."