From rbrennan@cam.ac.uk Tue Jul 25 15:07:11 1995
Path: ashpoly!cascade!transat!sunet!nordrelay!cam!rbrennan
From: rbrennan@cam.ac.uk (Raj Brennan)
Newsgroups: comp.sys.m68k
Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul25.150711.5917@cam.ac.uk>
Date: Tue, 25 Jul 1995 15:07:11 GMT
Organization: University of Cambridge Computer Laboratory
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Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.

CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.
Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'.

One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket?

-- 
Raj Brennan -- University of Cambridge Computer Laboratory
"A soul is not exclusive to biology."

From ynovak@uni-hamburg.de Tue Jul 25 20:09:11 1995
Path: ashpoly!bigsur!pacrim!jpgate!kamome!uni-hamburg!ynovak
From: ynovak@uni-hamburg.de (Yuki Novak)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul25.200911.7573@uni-hamburg.de>
Date: Tue, 25 Jul 1995 20:09:11 GMT
References: <1995Jul25.150711.5917@cam.ac.uk>
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In article <1995Jul25.150711.5917@cam.ac.uk>, rbrennan@cam.ac.uk (Raj Brennan) writes:
> Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.
> CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Yuki Novak | ynovak@uni-hamburg.de
PGP Key fingerprint: 5E08 AB1A 11B3 47A1
"Keep the channels open."

From hperez@panix.com Wed Jul 26 05:20:11 1995
Path: ashpoly!cascade!transat!eunet-de!hansebox!panix!hperez
From: hperez@panix.com (Hana Pérez)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul26.052011.1810@panix.com>
Date: Wed, 26 Jul 1995 05:20:11 GMT
References: <1995Jul25.150711.5917@cam.ac.uk> <1995Jul25.200911.7573@uni-hamburg.de>
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In article <1995Jul25.200911.7573@uni-hamburg.de>, ynovak@uni-hamburg.de (Yuki Novak) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Hana Pérez -- Public Access Unix of New York
"The carrier frequency does not drift by accident."