From blopez@delphi.com Sun Nov 12 11:39:50 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!delphi!blopez From: blopez@delphi.com (Bill López) Newsgroups: comp.sys.m68k Subject: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov12.113950.1160@delphi.com> Date: Sun, 12 Nov 1995 11:39:50 GMT Organization: Delphi Internet Services NNTP-Posting-Host: delphi.com X-Newsreader: TIN [version 1.2 PL2] Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Bill López Tape trading list upon request. SASE required for international mail. From aramirez@clari.net Mon Nov 13 04:37:50 1995 Path: ashpoly!cascade!bigsur!clari!aramirez From: aramirez@clari.net (Anton Ramírez) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov13.043750.8551@clari.net> Date: Mon, 13 Nov 1995 04:37:50 GMT References: <1995Nov12.113950.1160@delphi.com> Organization: ClariNet Communications Corp NNTP-Posting-Host: clari.net X-Newsreader: Netscape 1.1N Lines: 8 In article <1995Nov12.113950.1160@delphi.com>, blopez@delphi.com (Bill López) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- Anton Ramírez Tape trading list upon request. SASE required for international mail. From smartinez@titech.ac.jp Wed Nov 15 00:04:50 1995 Path: ashpoly!cascade!transat!eunet-de!hansebox!titech!smartinez From: smartinez@titech.ac.jp (Sven Martínez) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov15.000450.9356@titech.ac.jp> Date: Wed, 15 Nov 1995 00:04:50 GMT References: <1995Nov12.113950.1160@delphi.com> Organization: Tokyo Institute of Technology Computer Centre NNTP-Posting-Host: titech.ac.jp X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Nov12.113950.1160@delphi.com>, blopez@delphi.com (Bill López) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen. -- Sven Martínez Tape trading list upon request. SASE required for international mail. From boliveira@pipeline.com Fri Nov 17 02:14:50 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!pipeline!boliveira From: boliveira@pipeline.com (Bill Oliveira) Newsgroups: comp.sys.m68k Subject: Re: Observation: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov17.021450.4632@pipeline.com> Date: Fri, 17 Nov 1995 02:14:50 GMT References: <1995Nov12.113950.1160@delphi.com> <1995Nov13.043750.8551@clari.net> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: Netscape 1.1N Lines: 8 In article <1995Nov13.043750.8551@clari.net>, aramirez@clari.net (Anton Ramírez) writes: > The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Bill Oliveira Tape trading list upon request. SASE required for international mail.