From mperez@tum.de Sun Jan 15 11:50:21 1995 Path: ashpoly!cascade!transat!ukc!fennimore!tum!mperez From: mperez@tum.de (Matthias Pérez) Newsgroups: comp.sys.m68k Subject: Question: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Jan15.115021.9265@tum.de> Date: Sun, 15 Jan 1995 11:50:21 GMT Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: Netscape 1.1N Lines: 11 Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. Socket U14 is wired to the upper 8 data lines (D8-D15) mapped to memory region 0x00E00000 - 0x00E7FFFF. The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. Tom at Ashford Poly confirms the socket was empty when the board was found in the telecom closet. -- Matthias Pérez Hayes Optima 288 @ ISDN 64k bps "They will send a copy in my place." From llee@kth.se Mon Jan 16 12:51:21 1995 Path: ashpoly!bigsur!pacrim!jpgate!kamome!kth!llee From: llee@kth.se (Liam Lee) Newsgroups: comp.sys.m68k Subject: Re: Question: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Jan16.125121.3420@kth.se> Date: Mon, 16 Jan 1995 12:51:21 GMT References: <1995Jan15.115021.9265@tum.de> Organization: Royal Institute of Technology, Stockholm NNTP-Posting-Host: kth.se X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1995Jan15.115021.9265@tum.de>, mperez@tum.de (Matthias Pérez) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! -- === Liam Lee === Dept of Electrical Engineering, Royal Institute of Technology, Stockholm "There are 14 nodes and only 10 countries. Count again."