From knakamura@cern.ch Thu Mar 17 22:18:38 1994 Path: ashpoly!cascade!brgate!saturno!cern!knakamura From: knakamura@cern.ch (Kenji Nakamura) Newsgroups: comp.sys.m68k Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar17.221838.7243@cern.ch> Date: Thu, 17 Mar 1994 22:18:38 GMT Organization: European Laboratory for Particle Physics, Geneva NNTP-Posting-Host: cern.ch X-Newsreader: NewsWatcher 2.0b24 Lines: 10 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Kenji Nakamura -- European Laboratory for Particle Physics, Geneva "Marcus is not one man." From ehernandez@kth.se Sun Mar 20 00:11:38 1994 Path: ashpoly!cascade!transat!sunet!nordrelay!kth!ehernandez From: ehernandez@kth.se (Elaine Hernández) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar20.001138.3434@kth.se> Date: Sun, 20 Mar 1994 00:11:38 GMT References: <1994Mar17.221838.7243@cern.ch> Organization: Royal Institute of Technology, Stockholm NNTP-Posting-Host: kth.se X-Newsreader: TIN [version 1.2 PL2] Lines: 10 In article <1994Mar17.221838.7243@cern.ch>, knakamura@cern.ch (Kenji Nakamura) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. > CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Elaine Hernández "Hardware is temporary. The signal survives." Mac IIci / 68882 FPU / FreeBSD 2.1 From gcampbell@uu.net Sun Mar 20 07:42:38 1994 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!uu!gcampbell From: gcampbell@uu.net (Graham Campbell) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1994Mar20.074238.7558@uu.net> Date: Sun, 20 Mar 1994 07:42:38 GMT References: <1994Mar17.221838.7243@cern.ch> Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: Netscape 1.1N Lines: 8 In article <1994Mar17.221838.7243@cern.ch>, knakamura@cern.ch (Kenji Nakamura) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Graham Campbell -- UUNET Technologies, Falls Church VA "5 sigma is a discovery. 7 is a question."