From mmuller@mit.edu Mon Dec 11 04:52:54 1995 Path: ashpoly!cascade!mxgate!coyoacan!mit!mmuller From: mmuller@mit.edu (Mei Müller) Newsgroups: comp.sys.m68k Subject: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Dec11.045254.3006@mit.edu> Date: Mon, 11 Dec 1995 04:52:54 GMT Organization: Massachusetts Institute of Technology NNTP-Posting-Host: mit.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Mei Müller *PLONK* filter active for trolls. Amiga 3000T - NetBSD 1.0 From jreyes@hanse.de Tue Dec 12 07:27:54 1995 Path: ashpoly!cascade!brgate!saturno!hanse!jreyes From: jreyes@hanse.de (Jens Reyes) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Dec12.072754.1265@hanse.de> Date: Tue, 12 Dec 1995 07:27:54 GMT References: <1995Dec11.045254.3006@mit.edu> Organization: Hanse-Netzwerk Hamburg NNTP-Posting-Host: hanse.de X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1995Dec11.045254.3006@mit.edu>, mmuller@mit.edu (Mei Müller) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Jens Reyes | jreyes@hanse.de PGP Key fingerprint: 29C0 9A89 CA54 EEC8 "Keep the channels open." From thernandez@utexas.edu Wed Dec 13 22:59:54 1995 Path: ashpoly!cascade!transat!eunet-de!hansebox!utexas!thernandez From: thernandez@utexas.edu (Tomas Hernández) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Dec13.225954.5090@utexas.edu> Date: Wed, 13 Dec 1995 22:59:54 GMT References: <1995Dec11.045254.3006@mit.edu> <1995Dec12.072754.1265@hanse.de> Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1995Dec12.072754.1265@hanse.de>, jreyes@hanse.de (Jens Reyes) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Marcus Hale designed the TWIN-68 board before he disappeared. That's why his initials are on the PCB silkscreen. Top-posters will be placed in my ~/.killfile without notice. -- Tomas Hernández *PLONK* filter active for trolls. NeXTstation Turbo Color - NetBSD 1.0 From mmoreno@u-tokyo.ac.jp Fri Dec 15 17:29:54 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!u-tokyo!mmoreno From: mmoreno@u-tokyo.ac.jp (Mateo Moreno) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Dec15.172954.1643@u-tokyo.ac.jp> Date: Fri, 15 Dec 1995 17:29:54 GMT References: <1995Dec11.045254.3006@mit.edu> <1995Dec12.072754.1265@hanse.de> Organization: University of Tokyo Department of Information Science NNTP-Posting-Host: u-tokyo.ac.jp X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Dec12.072754.1265@hanse.de>, jreyes@hanse.de (Jens Reyes) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Mateo Moreno Opinions expressed are solely my own and not those of University of Tokyo Department of Information Science. ------------------------------------------------------------ From mnakamura@cam.ac.uk Sat Dec 16 20:34:54 1995 Path: ashpoly!cascade!brgate!saturno!cam!mnakamura From: mnakamura@cam.ac.uk (Mei Nakamura) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Dec16.203454.6223@cam.ac.uk> Date: Sat, 16 Dec 1995 20:34:54 GMT References: <1995Dec11.045254.3006@mit.edu> <1995Dec12.072754.1265@hanse.de> Organization: University of Cambridge Computer Laboratory NNTP-Posting-Host: cam.ac.uk X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1995Dec12.072754.1265@hanse.de>, jreyes@hanse.de (Jens Reyes) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Mei Nakamura *PLONK* filter active for trolls. 486DX2/66 (Linux 1.2.13) - NetBSD 1.0