From nreyes@uu.net Sun Jan 01 09:19:02 1995 Path: ashpoly!cascade!brgate!saturno!uu!nreyes From: nreyes@uu.net (Natalia Reyes) Newsgroups: comp.sys.m68k Subject: Data: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan01.091902.9152@uu.net> Date: Sun, 01 Jan 1995 09:19:02 GMT Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: WinVN 0.99.5 Lines: 11 Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Natalia Reyes Opinions expressed are solely my own and not those of UUNET Technologies, Falls Church VA. ------------------------------------------------------------ From msantos@kiae.su Sun Jan 01 13:33:02 1995 Path: ashpoly!cascade!transat!eunet-de!hansebox!kiae!msantos From: msantos@kiae.su (Marisol Santos) Newsgroups: comp.sys.m68k Subject: Re: Data: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan01.133302.3157@kiae.su> Date: Sun, 01 Jan 1995 13:33:02 GMT References: <1995Jan01.091902.9152@uu.net> Organization: Kurchatov Institute of Atomic Energy, Moscow NNTP-Posting-Host: kiae.su X-Newsreader: Netscape 1.1N Lines: 11 In article <1995Jan01.091902.9152@uu.net>, nreyes@uu.net (Natalia Reyes) writes: > Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- Marisol Santos *PLONK* filter active for trolls. PC-9821Ap2 (NEC) - NetBSD 1.0 From mjohansson@unam.mx Mon Jan 02 08:42:02 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!unam!mjohansson From: mjohansson@unam.mx (Mathieu Johansson) Newsgroups: comp.sys.m68k Subject: Re: Data: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan02.084202.9885@unam.mx> Date: Mon, 02 Jan 1995 08:42:02 GMT References: <1995Jan01.091902.9152@uu.net> <1995Jan01.133302.3157@kiae.su> Organization: Universidad Nacional Autónoma de México (DGSCA) NNTP-Posting-Host: unam.mx X-Newsreader: Netscape 1.1N Lines: 10 In article <1995Jan01.133302.3157@kiae.su>, msantos@kiae.su (Marisol Santos) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. Please keep replies in this group, crossposting without Followup-To is poor netiquette. -- Mathieu Johansson Tape trading list upon request. SASE required for international mail. From skang@rwth-aachen.de Mon Jan 02 14:34:02 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!rwth-aachen!skang From: skang@rwth-aachen.de (Sun-mi Kang) Newsgroups: comp.sys.m68k Subject: Re: Data: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jan02.143402.1235@rwth-aachen.de> Date: Mon, 02 Jan 1995 14:34:02 GMT References: <1995Jan01.091902.9152@uu.net> <1995Jan01.133302.3157@kiae.su> Organization: RWTH Aachen Informatik NNTP-Posting-Host: rwth-aachen.de X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Jan01.133302.3157@kiae.su>, msantos@kiae.su (Marisol Santos) writes: > That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Sun-mi Kang Hayes Optima 288 @ 28,800 bps "Extraordinary claims require extraordinary spectra."