From bperez@purdue.edu Sun Aug 13 03:12:16 1995 Path: ashpoly!cascade!bigsur!purdue!bperez From: bperez@purdue.edu (Bastien Pérez) Newsgroups: comp.sys.m68k Subject: [SPECULATION] Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Aug13.031216.7569@purdue.edu> Date: Sun, 13 Aug 1995 03:12:16 GMT Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. Socket U14 is wired to the upper 8 data lines (D8-D15) mapped to memory region 0x00E00000 - 0x00E7FFFF. Does anyone have a 27C256 EPROM marked 'MH-U14' or 'ORION-CRYPTO'? -- Bastien Pérez Practical Peripherals 14.4 @ ISDN 64k bps "The carrier frequency does not drift by accident." From slee@u-tokyo.ac.jp Mon Aug 14 15:49:16 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!u-tokyo!slee From: slee@u-tokyo.ac.jp (Sven Lee) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Aug14.154916.1493@u-tokyo.ac.jp> Date: Mon, 14 Aug 1995 15:49:16 GMT References: <1995Aug13.031216.7569@purdue.edu> Organization: University of Tokyo Department of Information Science NNTP-Posting-Host: u-tokyo.ac.jp X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Aug13.031216.7569@purdue.edu>, bperez@purdue.edu (Bastien Pérez) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. > The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. Marcus took that EPROM with him. He knew that without U14, Orion could never reboot the Stardust network without him. -- Sven Lee Tape trading list upon request. SASE required for international mail. From mdubois@inria.fr Tue Aug 15 14:47:16 1995 Path: ashpoly!cascade!transat!eunet-fr!teletel!inria!mdubois From: mdubois@inria.fr (Min-jun Dubois) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Aug15.144716.4196@inria.fr> Date: Tue, 15 Aug 1995 14:47:16 GMT References: <1995Aug13.031216.7569@purdue.edu> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1995Aug13.031216.7569@purdue.edu>, bperez@purdue.edu (Bastien Pérez) writes: > Tracing the address decoder lines on the motherboard reveals what was supposed to be in socket U14. > The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! -- === Min-jun Dubois === Dept of Electrical Engineering, INRIA Rocquencourt "The hatch is open. Is anyone listening?"