From slarsson@earthlink.net Mon Jun 26 22:26:00 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!earthlink!slarsson From: slarsson@earthlink.net (Sven Larsson) Newsgroups: comp.sys.m68k Subject: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jun26.222600.7615@earthlink.net> Date: Mon, 26 Jun 1995 22:26:00 GMT Organization: EarthLink Network NNTP-Posting-Host: earthlink.net X-Newsreader: TIN [version 1.2 PL2] Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Sven Larsson | slarsson@earthlink.net PGP Key fingerprint: 21ED 5B4B 1C08 F98D "Keep the channels open." From mnilsson@cmu.edu Tue Jun 27 01:00:00 1995 Path: ashpoly!cascade!brgate!saturno!cmu!mnilsson From: mnilsson@cmu.edu (Mateo Nilsson) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jun27.010000.9201@cmu.edu> Date: Tue, 27 Jun 1995 01:00:00 GMT References: <1995Jun26.222600.7615@earthlink.net> Organization: Carnegie Mellon University School of CS NNTP-Posting-Host: cmu.edu X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1995Jun26.222600.7615@earthlink.net>, slarsson@earthlink.net (Sven Larsson) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. PGP Public key available via finger or upon request. -- Mateo Nilsson | mnilsson@cmu.edu PGP Key fingerprint: 3544 DE57 6406 51C4 "Keep the channels open." From mokonkwo@tum.de Wed Jun 28 08:28:00 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!tum!mokonkwo From: mokonkwo@tum.de (Min-jun Okonkwo) Newsgroups: comp.sys.m68k Subject: Re: [INFO] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jun28.082800.5886@tum.de> Date: Wed, 28 Jun 1995 08:28:00 GMT References: <1995Jun26.222600.7615@earthlink.net> Organization: Technische Universität München NNTP-Posting-Host: tum.de X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1995Jun26.222600.7615@earthlink.net>, slarsson@earthlink.net (Sven Larsson) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Min-jun Okonkwo "Hold for relay." Sun 3/60 (SunOS 4.1.1) / NEXTSTEP 3.3