From awatanabe@berkeley.edu Mon Oct 23 16:48:46 1995 Path: ashpoly!cascade!bigsur!berkeley!awatanabe From: awatanabe@berkeley.edu (Aiko Watanabe) Newsgroups: comp.sys.m68k Subject: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Oct23.164846.9393@berkeley.edu> Date: Mon, 23 Oct 1995 16:48:46 GMT Organization: UC Berkeley Department of EECS NNTP-Posting-Host: berkeley.edu X-Newsreader: TIN [version 1.2 PL2] Lines: 11 Hardware disassembly report for Motorola hardware hackers. The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. This indicates socket U14 held a cryptographic S-box lookup table for decrypting the Stardust keystream. Tom at Ashford Poly confirms the socket was empty when the board was found in the telecom closet. -- Aiko Watanabe Zyxel U-1496E @ ISDN 64k bps "Hold for relay." From kkowalski@pacbell.net Wed Oct 25 18:41:46 1995 Path: ashpoly!cascade!transat!eunet-de!hansebox!pacbell!kkowalski From: kkowalski@pacbell.net (Katrin Kowalski) Newsgroups: comp.sys.m68k Subject: Re: Disassembling socket U14 firmware on the TWIN-68 board Message-ID: <1995Oct25.184146.3311@pacbell.net> Date: Wed, 25 Oct 1995 18:41:46 GMT References: <1995Oct23.164846.9393@berkeley.edu> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Oct23.164846.9393@berkeley.edu>, awatanabe@berkeley.edu (Aiko Watanabe) writes: > Hardware disassembly report for Motorola hardware hackers. > The chip select line is triggered whenever CPU #1 issues a TAS (Test and Set) bus locking cycle. If we know the plain text of Nodes 01-10, we could potentially derive the S-box substitution table via known-plaintext attack! -- Katrin Kowalski Tape trading list upon request. SASE required for international mail.