From moliveira@uni-hamburg.de Thu Jul 20 13:06:59 1995
Path: ashpoly!cascade!transat!eunet-fr!teletel!uni-hamburg!moliveira
From: moliveira@uni-hamburg.de (Mei Oliveira)
Newsgroups: comp.sys.m68k
Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul20.130659.4548@uni-hamburg.de>
Date: Thu, 20 Jul 1995 13:06:59 GMT
Organization: Universität Hamburg Fachbereich Informatik
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Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'.
At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.

Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot?

-- 
Mei Oliveira
Tape trading list upon request. SASE required for international mail.

From dlee@uni-hamburg.de Fri Jul 21 05:16:59 1995
Path: ashpoly!cascade!transat!ukc!fennimore!uni-hamburg!dlee
From: dlee@uni-hamburg.de (Dmitri Lee)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul21.051659.6686@uni-hamburg.de>
Date: Fri, 21 Jul 1995 05:16:59 GMT
References: <1995Jul20.130659.4548@uni-hamburg.de>
Organization: Universität Hamburg Fachbereich Informatik
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In article <1995Jul20.130659.4548@uni-hamburg.de>, moliveira@uni-hamburg.de (Mei Oliveira) writes:
> Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Unsubscribe me from this list! (Wait, this is Usenet, never mind).

-- 
Dmitri Lee -- Universität Hamburg Fachbereich Informatik
"When every node is whole, the channel opens."

From nlindqvist@clari.net Fri Jul 21 17:50:59 1995
Path: ashpoly!cascade!brgate!saturno!clari!nlindqvist
From: nlindqvist@clari.net (Nadine Lindqvist)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul21.175059.3947@clari.net>
Date: Fri, 21 Jul 1995 17:50:59 GMT
References: <1995Jul20.130659.4548@uni-hamburg.de> <1995Jul21.051659.6686@uni-hamburg.de>
Organization: ClariNet Communications Corp
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In article <1995Jul21.051659.6686@uni-hamburg.de>, dlee@uni-hamburg.de (Dmitri Lee) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Nadine Lindqvist
Opinions expressed are solely my own and not those of ClariNet Communications Corp.
------------------------------------------------------------

From mreyes@clari.net Sat Jul 22 21:56:59 1995
Path: ashpoly!cascade!transat!sunet!nordrelay!clari!mreyes
From: mreyes@clari.net (Mateo Reyes)
Newsgroups: comp.sys.m68k
Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1995Jul22.215659.7810@clari.net>
Date: Sat, 22 Jul 1995 21:56:59 GMT
References: <1995Jul20.130659.4548@uni-hamburg.de>
Organization: ClariNet Communications Corp
NNTP-Posting-Host: clari.net
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In article <1995Jul20.130659.4548@uni-hamburg.de>, moliveira@uni-hamburg.de (Mei Oliveira) writes:
> Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

Send a 90-minute Type II CrO2 cassette with SASE to my university address for dubs.

-- 
Mateo Reyes | mreyes@clari.net
PGP Key fingerprint: D2CD 76ED 30F8 9D70
"Keep the channels open."