From coliveira@unam.mx Mon Jun 12 02:30:08 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!unam!coliveira From: coliveira@unam.mx (Camila Oliveira) Newsgroups: comp.sys.m68k Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jun12.023008.4158@unam.mx> Date: Mon, 12 Jun 1995 02:30:08 GMT Organization: Universidad Nacional Autónoma de México (DGSCA) NNTP-Posting-Host: unam.mx X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- === Camila Oliveira === Dept of Electrical Engineering, Universidad Nacional Autónoma de México (DGSCA) "Extraordinary claims require extraordinary spectra." From mnilsson@pipeline.com Tue Jun 13 08:27:08 1995 Path: ashpoly!cascade!transat!ukc!fennimore!pipeline!mnilsson From: mnilsson@pipeline.com (Marisol Nilsson) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Jun13.082708.7575@pipeline.com> Date: Tue, 13 Jun 1995 08:27:08 GMT References: <1995Jun12.023008.4158@unam.mx> Organization: The Pipeline Internet Network NNTP-Posting-Host: pipeline.com X-Newsreader: WinVN 0.99.5 Lines: 9 In article <1995Jun12.023008.4158@unam.mx>, coliveira@unam.mx (Camila Oliveira) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Marisol Nilsson Practical Peripherals 14.4 @ ISDN 64k bps "We don't sign stars. We build them."