From tlaurent@mindspring.com Fri May 03 09:44:17 1996
Path: ashpoly!bigsur!pacrim!krgate!eunha!mindspring!tlaurent
From: tlaurent@mindspring.com (Thiago Laurent)
Newsgroups: comp.sys.m68k
Subject: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996May03.094417.7898@mindspring.com>
Date: Fri, 03 May 1996 09:44:17 GMT
Organization: MindSpring Enterprises
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Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.

CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.
The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank.

One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket?

-- 
Thiago Laurent -- MindSpring Enterprises
"The carrier frequency does not drift by accident."

From arobertson@kth.se Sat May 04 04:08:17 1996
Path: ashpoly!cascade!transat!ukc!fennimore!kth!arobertson
From: arobertson@kth.se (Anton Robertson)
Newsgroups: comp.sys.m68k
Subject: Re: [FLAME] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1996May04.040817.7841@kth.se>
Date: Sat, 04 May 1996 04:08:17 GMT
References: <1996May03.094417.7898@mindspring.com>
Organization: Royal Institute of Technology, Stockholm
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In article <1996May03.094417.7898@mindspring.com>, tlaurent@mindspring.com (Thiago Laurent) writes:
> Hardware teardown of the dual-68000 DSP accelerator board used in the Stardust project.
> CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Anton Robertson
Opinions expressed are solely my own and not those of Royal Institute of Technology, Stockholm.
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