From atakahashi@demon.co.uk Fri Apr 19 07:07:35 1996 Path: ashpoly!cascade!transat!eunet-fr!teletel!demon!atakahashi From: atakahashi@demon.co.uk (Andrei Takahashi) Newsgroups: comp.sys.m68k Subject: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Apr19.070735.1856@demon.co.uk> Date: Fri, 19 Apr 1996 07:07:35 GMT Organization: Demon Internet Services UK NNTP-Posting-Host: demon.co.uk X-Newsreader: WinVN 0.99.5 Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit. At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Andrei Takahashi Tape trading list upon request. SASE required for international mail. From arobertson@panix.com Sun Apr 21 10:37:35 1996 Path: ashpoly!cascade!bigsur!panix!arobertson From: arobertson@panix.com (Amy Robertson) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Apr21.103735.5508@panix.com> Date: Sun, 21 Apr 1996 10:37:35 GMT References: <1996Apr19.070735.1856@demon.co.uk> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1996Apr19.070735.1856@demon.co.uk>, atakahashi@demon.co.uk (Andrei Takahashi) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Amy Robertson "Row 14. No joke." Macintosh IIfx / TOS 4.04