From amartinez@purdue.edu Wed May 08 20:40:41 1996 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!purdue!amartinez From: amartinez@purdue.edu (Anja Martínez) Newsgroups: comp.sys.m68k Subject: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996May08.204041.6320@purdue.edu> Date: Wed, 08 May 1996 20:40:41 GMT Organization: Purdue University Engineering Computer Network NNTP-Posting-Host: purdue.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Anja Martínez *PLONK* filter active for trolls. Commodore Amiga 500 (1MB OCS) - NetBSD 1.0 From kfournier@pacbell.net Thu May 09 20:32:41 1996 Path: ashpoly!cascade!brgate!saturno!pacbell!kfournier From: kfournier@pacbell.net (Katrin Fournier) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996May09.203241.1107@pacbell.net> Date: Thu, 09 May 1996 20:32:41 GMT References: <1996May08.204041.6320@purdue.edu> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: NewsWatcher 2.0b24 Lines: 12 In article <1996May08.204041.6320@purdue.edu>, amartinez@purdue.edu (Anja Martínez) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Looks like a prototype telecommunications board for military secure voice, not an audio music product. Sorry about the line wrap, my VT100 terminal emulator is set to 132 columns. -- === Katrin Fournier === Dept of Electrical Engineering, Pacific Bell Internet Services "We don't sign stars. We build them." From nsilva@stanford.edu Sat May 11 15:34:41 1996 Path: ashpoly!bigsur!pacrim!krgate!eunha!stanford!nsilva From: nsilva@stanford.edu (Nadia Silva) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996May11.153441.6197@stanford.edu> Date: Sat, 11 May 1996 15:34:41 GMT References: <1996May08.204041.6320@purdue.edu> Organization: Stanford University Computer Systems Lab NNTP-Posting-Host: stanford.edu X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1996May08.204041.6320@purdue.edu>, amartinez@purdue.edu (Anja Martínez) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Nadia Silva "We don't sign stars. We build them." Commodore Amiga 500 (1MB OCS) / TOS 4.04