From hivanov@inria.fr Sat Nov 02 22:32:05 1996 Path: ashpoly!cascade!brgate!saturno!inria!hivanov From: hivanov@inria.fr (Hana Ivanov) Newsgroups: comp.sys.m68k Subject: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov02.223205.2235@inria.fr> Date: Sat, 02 Nov 1996 22:32:05 GMT Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- Hana Ivanov Opinions expressed are solely my own and not those of INRIA Rocquencourt. ------------------------------------------------------------ From psantos@kth.se Sun Nov 03 02:37:05 1996 Path: ashpoly!cascade!transat!sunet!nordrelay!kth!psantos From: psantos@kth.se (Pavel Santos) Newsgroups: comp.sys.m68k Subject: Re: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov03.023705.1241@kth.se> Date: Sun, 03 Nov 1996 02:37:05 GMT References: <1996Nov02.223205.2235@inria.fr> Organization: Royal Institute of Technology, Stockholm NNTP-Posting-Host: kth.se X-Newsreader: WinVN 0.99.5 Lines: 8 In article <1996Nov02.223205.2235@inria.fr>, hivanov@inria.fr (Hana Ivanov) writes: > Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Pavel Santos -- Royal Institute of Technology, Stockholm "We don't sign stars. We build them."