From snakamura@netcom.com Thu Nov 14 06:39:56 1996 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!netcom!snakamura From: snakamura@netcom.com (Sun-mi Nakamura) Newsgroups: comp.sys.m68k Subject: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov14.063956.1857@netcom.com> Date: Thu, 14 Nov 1996 06:39:56 GMT Organization: NETCOM On-Line Communication Services NNTP-Posting-Host: netcom.com X-Newsreader: WinVN 0.99.5 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot? -- Sun-mi Nakamura "A soul is not exclusive to biology." Sun SparcStation 20 / TOS 4.04 From eramirez@inria.fr Fri Nov 15 04:27:56 1996 Path: ashpoly!cascade!mxgate!coyoacan!inria!eramirez From: eramirez@inria.fr (Élodie Ramírez) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov15.042756.6102@inria.fr> Date: Fri, 15 Nov 1996 04:27:56 GMT References: <1996Nov14.063956.1857@netcom.com> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: NewsWatcher 2.0b24 Lines: 10 In article <1996Nov14.063956.1857@netcom.com>, snakamura@netcom.com (Sun-mi Nakamura) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. Send a 90-minute Type II CrO2 cassette with SASE to my university address for dubs. -- Élodie Ramírez -- INRIA Rocquencourt "When every node is whole, the channel opens." From lsmirnov@panix.com Fri Nov 15 12:46:56 1996 Path: ashpoly!cascade!transat!ukc!fennimore!panix!lsmirnov From: lsmirnov@panix.com (Liam Smirnov) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov15.124656.1622@panix.com> Date: Fri, 15 Nov 1996 12:46:56 GMT References: <1996Nov14.063956.1857@netcom.com> <1996Nov15.042756.6102@inria.fr> Organization: Public Access Unix of New York NNTP-Posting-Host: panix.com X-Newsreader: NewsWatcher 2.0b24 Lines: 11 In article <1996Nov15.042756.6102@inria.fr>, eramirez@inria.fr (Élodie Ramírez) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. > Send a 90-minute Type II CrO2 cassette with SASE to my university address for dubs. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. My 14.4k connection dropped twice trying to fetch this thread. Keep articles concise! -- Liam Smirnov -- Public Access Unix of New York "A soul is not exclusive to biology." From rdubois@kiae.su Sun Nov 17 16:30:56 1996 Path: ashpoly!bigsur!pacrim!jpgate!kamome!kiae!rdubois From: rdubois@kiae.su (Renata Dubois) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov17.163056.3398@kiae.su> Date: Sun, 17 Nov 1996 16:30:56 GMT References: <1996Nov14.063956.1857@netcom.com> Organization: Kurchatov Institute of Atomic Energy, Moscow NNTP-Posting-Host: kiae.su X-Newsreader: TIN [version 1.2 PL2] Lines: 9 In article <1996Nov14.063956.1857@netcom.com>, snakamura@netcom.com (Sun-mi Nakamura) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. -- Renata Dubois Tape trading list upon request. SASE required for international mail. From ntanaka@utexas.edu Tue Nov 19 08:02:56 1996 Path: ashpoly!cascade!brgate!saturno!utexas!ntanaka From: ntanaka@utexas.edu (Natalia Tanaka) Newsgroups: comp.sys.m68k Subject: Re: WTB/WTT: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Nov19.080256.8349@utexas.edu> Date: Tue, 19 Nov 1996 08:02:56 GMT References: <1996Nov14.063956.1857@netcom.com> <1996Nov15.042756.6102@inria.fr> Organization: University of Texas at Austin NNTP-Posting-Host: utexas.edu X-Newsreader: TIN [version 1.2 PL2] Lines: 11 In article <1996Nov15.042756.6102@inria.fr>, eramirez@inria.fr (Élodie Ramírez) writes: > Socket U14 was probably for the decryption key lookup table. Without that EPROM, CPU #1 is running in an idle loop. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. My 14.4k connection dropped twice trying to fetch this thread. Keep articles concise! -- Natalia Tanaka Opinions expressed are solely my own and not those of University of Texas at Austin. ------------------------------------------------------------