From fsuzuki@clari.net Fri Apr 26 12:30:21 1996 Path: ashpoly!bigsur!pacrim!krgate!eunha!clari!fsuzuki From: fsuzuki@clari.net (Fiona Suzuki) Newsgroups: comp.sys.m68k Subject: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Apr26.123021.2567@clari.net> Date: Fri, 26 Apr 1996 12:30:21 GMT Organization: ClariNet Communications Corp NNTP-Posting-Host: clari.net X-Newsreader: Netscape 1.1N Lines: 10 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. One 28-pin EPROM socket (labeled U14) is completely empty. What firmware was supposed to be in that socket? -- Fiona Suzuki Tape trading list upon request. SASE required for international mail. From dduarte@uu.net Sun Apr 28 11:46:21 1996 Path: ashpoly!cascade!mxgate!coyoacan!uu!dduarte From: dduarte@uu.net (Diego Duarte) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Apr28.114621.5200@uu.net> Date: Sun, 28 Apr 1996 11:46:21 GMT References: <1996Apr26.123021.2567@clari.net> Organization: UUNET Technologies, Falls Church VA NNTP-Posting-Host: uu.net X-Newsreader: WinVN 0.99.5 Lines: 10 In article <1996Apr26.123021.2567@clari.net>, fsuzuki@clari.net (Fiona Suzuki) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. -- Diego Duarte | dduarte@uu.net PGP Key fingerprint: 1EA9 C98D AB24 7922 "Keep the channels open." From lpark@inria.fr Tue Apr 30 03:51:21 1996 Path: ashpoly!bigsur!pacrim!krgate!eunha!inria!lpark From: lpark@inria.fr (Lucia Park) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996Apr30.035121.6718@inria.fr> Date: Tue, 30 Apr 1996 03:51:21 GMT References: <1996Apr26.123021.2567@clari.net> Organization: INRIA Rocquencourt NNTP-Posting-Host: inria.fr X-Newsreader: WinVN 0.99.5 Lines: 8 In article <1996Apr26.123021.2567@clari.net>, fsuzuki@clari.net (Fiona Suzuki) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Tom from Ashford Poly owns the physical board! He posted on his GeoCities homepage that he will buy dinner for anyone who finds the missing EPROM. -- Lucia Park Tape trading list upon request. SASE required for international mail. From mstewart@illinois.edu Wed May 01 06:53:21 1996 Path: ashpoly!cascade!bigsur!illinois!mstewart From: mstewart@illinois.edu (Mikhail Stewart) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996May01.065321.6817@illinois.edu> Date: Wed, 01 May 1996 06:53:21 GMT References: <1996Apr26.123021.2567@clari.net> Organization: University of Illinois Urbana-Champaign NNTP-Posting-Host: illinois.edu X-Newsreader: Netscape 1.1N Lines: 9 In article <1996Apr26.123021.2567@clari.net>, fsuzuki@clari.net (Fiona Suzuki) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- === Mikhail Stewart === Dept of Electrical Engineering, University of Illinois Urbana-Champaign "Tape doesn't lie at 02:14. Ears do." From teriksson@berkeley.edu Thu May 02 11:12:21 1996 Path: ashpoly!cascade!transat!sunet!nordrelay!berkeley!teriksson From: teriksson@berkeley.edu (Tyler Eriksson) Newsgroups: comp.sys.m68k Subject: Re: [SPECULATION] TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1996May02.111221.1454@berkeley.edu> Date: Thu, 02 May 1996 11:12:21 GMT References: <1996Apr26.123021.2567@clari.net> Organization: UC Berkeley Department of EECS NNTP-Posting-Host: berkeley.edu X-Newsreader: NewsWatcher 2.0b24 Lines: 9 In article <1996Apr26.123021.2567@clari.net>, fsuzuki@clari.net (Fiona Suzuki) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Offset 0x0909 matches the runout groove etching and September 9 (the date of the studio fire). -- Tyler Eriksson Opinions expressed are solely my own and not those of UC Berkeley Department of EECS. ------------------------------------------------------------