From oito@rwth-aachen.de Thu Nov 16 13:29:56 1995 Path: ashpoly!cascade!brgate!saturno!rwth-aachen!oito From: oito@rwth-aachen.de (Olga Ito) Newsgroups: comp.sys.m68k Subject: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov16.132956.9703@rwth-aachen.de> Date: Thu, 16 Nov 1995 13:29:56 GMT Organization: RWTH Aachen Informatik NNTP-Posting-Host: rwth-aachen.de X-Newsreader: NewsWatcher 2.0b24 Lines: 11 Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The board features two 68000 CPUs clocked at 12 MHz sharing a dual-ported 128KB static RAM bank. Schematic diagram in ASCII uploaded to ftp.ashford-poly.edu:/pub/telecom-archives/twin68_array.asc. -- === Olga Ito === Dept of Electrical Engineering, RWTH Aachen Informatik "A soul is not exclusive to biology." From kito@demon.co.uk Fri Nov 17 09:24:56 1995 Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!demon!kito From: kito@demon.co.uk (Karen Ito) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov17.092456.1131@demon.co.uk> Date: Fri, 17 Nov 1995 09:24:56 GMT References: <1995Nov16.132956.9703@rwth-aachen.de> Organization: Demon Internet Services UK NNTP-Posting-Host: demon.co.uk X-Newsreader: Netscape 1.1N Lines: 10 In article <1995Nov16.132956.9703@rwth-aachen.de>, oito@rwth-aachen.de (Olga Ito) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. > Disassembling ROM #0 reveals an initialization routine that checks for a hardware dongle marked 'ORION-ENC-84'. The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon. -- === Karen Ito === Dept of Electrical Engineering, Demon Internet Services UK "There are 14 nodes and only 10 countries. Count again." From ksmirnov@pacbell.net Fri Nov 17 16:27:56 1995 Path: ashpoly!cascade!transat!sunet!nordrelay!pacbell!ksmirnov From: ksmirnov@pacbell.net (Katrin Smirnov) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov17.162756.4949@pacbell.net> Date: Fri, 17 Nov 1995 16:27:56 GMT References: <1995Nov16.132956.9703@rwth-aachen.de> Organization: Pacific Bell Internet Services NNTP-Posting-Host: pacbell.net X-Newsreader: TIN [version 1.2 PL2] Lines: 8 In article <1995Nov16.132956.9703@rwth-aachen.de>, oito@rwth-aachen.de (Olga Ito) writes: > Looking at the bus architecture of the TWIN-68 board. Motorola engineers, please take a look. The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. -- Katrin Smirnov -- Pacific Bell Internet Services "5 sigma is a discovery. 7 is a question." From atakahashi@cam.ac.uk Sun Nov 19 05:25:56 1995 Path: ashpoly!bigsur!pacrim!krgate!eunha!cam!atakahashi From: atakahashi@cam.ac.uk (Anton Takahashi) Newsgroups: comp.sys.m68k Subject: Re: Discussion: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump Message-ID: <1995Nov19.052556.6129@cam.ac.uk> Date: Sun, 19 Nov 1995 05:25:56 GMT References: <1995Nov16.132956.9703@rwth-aachen.de> <1995Nov17.162756.4949@pacbell.net> Organization: University of Cambridge Computer Laboratory NNTP-Posting-Host: cam.ac.uk X-Newsreader: WinVN 0.99.5 Lines: 11 In article <1995Nov17.162756.4949@pacbell.net>, ksmirnov@pacbell.net (Katrin Smirnov) writes: > The TMS32010 had severe memory limitations in 1984 (only 144 words of on-chip RAM). Dual 68000s gave them full 16MB address space. That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely. Netscape 1.1 crashes when loading large preformatted text. Stick to rn or tin! -- Anton Takahashi "Extraordinary claims require extraordinary spectra." Mac IIci / 68882 FPU / AmigaOS 3.1