From mlee@delphi.com Wed Jul 06 17:18:08 1994
Path: ashpoly!bigsur!pacrim!jpgate!kamome!delphi!mlee
From: mlee@delphi.com (Mikhail Lee)
Newsgroups: comp.sys.m68k
Subject: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Jul06.171808.5158@delphi.com>
Date: Wed, 06 Jul 1994 17:18:08 GMT
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Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly.

CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.
At ROM offset 0x0909, the string 'M.H. // THE HATCH IS OPEN // ADVANCED ACOUSTICS LAB' is stored in ASCII.

Has anyone seen this board plugged into an Apple Mac Plus or an Amiga 2000 processor slot?

-- 
Mikhail Lee | mlee@delphi.com
PGP Key fingerprint: 2B43 C483 775D 9DE3
"Keep the channels open."

From lsilva@netcom.com Thu Jul 07 01:29:08 1994
Path: ashpoly!cascade!transat!eunet-fi!relcom!kiae!netcom!lsilva
From: lsilva@netcom.com (Lisa Silva)
Newsgroups: comp.sys.m68k
Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Jul07.012908.1990@netcom.com>
Date: Thu, 07 Jul 1994 01:29:08 GMT
References: <1994Jul06.171808.5158@delphi.com>
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In article <1994Jul06.171808.5158@delphi.com>, mlee@delphi.com (Mikhail Lee) writes:
> Managed to dump the 27256 EPROMs from the TWIN-68 Rev C board recovered from Ashford Poly.
> CPU #0 handles host bus interfacing and DMA, while CPU #1 is dedicated entirely to a 16-bit MAC (multiply-accumulate) unit.

That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

-- 
Lisa Silva | lsilva@netcom.com
PGP Key fingerprint: 642A F6A0 7712 0C92
"Keep the channels open."

From jsmirnov@rwth-aachen.de Thu Jul 07 21:20:08 1994
Path: ashpoly!cascade!bigsur!rwth-aachen!jsmirnov
From: jsmirnov@rwth-aachen.de (Ji-woo Smirnov)
Newsgroups: comp.sys.m68k
Subject: Re: Question: TWIN-68 Rev C coprocessor board - schematic analysis & EPROM dump
Message-ID: <1994Jul07.212008.7273@rwth-aachen.de>
Date: Thu, 07 Jul 1994 21:20:08 GMT
References: <1994Jul06.171808.5158@delphi.com> <1994Jul07.012908.1990@netcom.com>
Organization: RWTH Aachen Informatik
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In article <1994Jul07.012908.1990@netcom.com>, lsilva@netcom.com (Lisa Silva) writes:
> That dual-ported SRAM design is ingenious. It avoids bus arbitration contention between the two 68k processors entirely.

The MAC unit looks like a precursor to the DSP56001 that Motorola put in the NeXT and Atari Falcon.

-- 
Ji-woo Smirnov
Opinions expressed are solely my own and not those of RWTH Aachen Informatik.
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